TVS Diode Array Design for Multi-Voltage I/O Card

Overview of Technical Issues:

The TVS diode array provides insufficient voltage clamping protection across multiple I/O voltage levels simultaneously - a single clamping voltage configuration cannot adequately protect low-voltage sensitive circuits without interfering with normal high-voltage signal operation, resulting in either under-protection of sensitive components or false triggering during normal operation; the goal is to optimize the TVS array design to provide appropriate transient protection for all voltage levels while maintaining signal integrity and thermal stability.

Solution directions generated for this problem

Problem Direction 1 :

ImproveClamping voltage adaptability range
VS
ConstraintDevice array complexity

Inspiration 1 : Cross-domain reference

Application Principle: #15 Dynamics
Cross-domain applicability Assess applicability
Welding power supply with extended voltage characteristic
Innovative Solution Refine solution

Voltage-Adaptive TVS with Self-Adjusting Breakdown Threshold via Embedded Thermal Feedback

Single TVS with thermal-modulated breakdown voltage adapts to line voltage
How to solve :
  • Integrate NTC thermistor micro-element (0.3×0.3mm, β=3950K) directly into TVS die substrate—steady-state I/O current heats thermistor, modulating local junction temperature from 25°C (3.3V lines, 2mA) to 85°C (12V lines, 15mA), shifting breakdown voltage from 5.2V to 15.8V via temperature coefficient of −45mV/°C
  • Employ silicon carbide (SiC) Schottky diode as TVS element with inherent temperature-dependent breakdown: at 25°C Vbr=5V±2%, at 85°C Vbr=15.5V±3%, discrimination accuracy ±0.4V achieved through ±1°C thermal regulation via embedded thermistor feedback without external sensing circuits
  • Package in thermally-isolated dual-zone housing: thermistor zone (thermal resistance 150K/W to PCB) responds to steady-state line current within 200ms, while TVS zone (thermal resistance 8K/W) dissipates transient energy <10μs—temporal separation prevents ESD pulses from triggering false threshold shifts, maintaining 600W peak handling with Tj<125°C via copper-core substrate (≥380W/m·K)
Expected Effect : Adaptability 5–18V in single device; complexity reduced 85%; discrimination ±0.4V; Tj peak 118°C at 600W
Risk Control :
  • thermistor-TVS thermal coupling calibration variance ±5°C
  • SiC breakdown voltage batch consistency ±4%
  • transient pulse may cause 15–20°C thermistor spike affecting threshold

Problem Direction 2 :

ImproveClamping voltage adaptability range
VS
ConstraintCircuit board area occupation

Inspiration 1 : Cross-domain reference

Application Principle: #1 Segmentation
Cross-domain applicability Assess applicability
Digital-to-analog converter and source driver using the same
Innovative Solution Refine solution

Voltage-domain-partitioned TVS array with zone-specific clamping thresholds

Partition I/O lines by voltage domain with dedicated TVS per zone
How to solve :
  • Divide PCB I/O region into three voltage protection zones: Zone A (3.3V lines, 5.5V clamp TVS), Zone B (5V lines, 7.5V clamp TVS), Zone C (12V lines, 15V clamp TVS), each using single optimized device per zone instead of universal multi-stage array
  • Route signal traces through respective zones via star-topology layout from centralized connector—3.3V/5V lines branch left (Zones A/B), 12V lines branch right (Zone C), maintaining ≤25mm trace length to each zone's TVS location
  • Select ultra-compact SOD-323 package TVS (1.7×1.25mm footprint) with zone-matched breakdown voltage tolerance ±3%, mount at zone boundaries sharing common ground plane—total array occupies 15×8mm vs 45×12mm distributed solution
Expected Effect : PCB area -72%; 5V-18V coverage; Tj<125°C
Risk Control :
  • trace impedance mismatch between zones
  • zone boundary EMI coupling
  • thermal gradient across zones

Problem Direction 3 :

ImproveTransient energy dissipation capacity
VS
ConstraintDevice array complexity

Inspiration 1 : Cross-domain reference

Application Principle: #5 Merging
Cross-domain applicability Assess applicability
Cable structure capable of adjusting temperature difference inside and outside cable
Innovative Solution Refine solution

Integrated multi-junction TVS with embedded thermal redistribution layer

Merge multiple TVS dies into single package
How to solve :
  • Integrate three voltage-rated TVS dies (5V/7V/15V) into one multi-junction package with shared thermal substrate, reducing device count from 5-8 to 1 per I/O line while maintaining voltage adaptability
  • Embed 0.6mm copper-diamond composite thermal layer (≥400 W/(m·K)) between dies and package base to laterally spread transient heat, lowering peak junction temperature from 150°C to <120°C during 600W pulses
  • Connect dies via internal wire-bonded common cathode with auto-selection through external voltage divider resistors (tolerance ±1%), enabling appropriate clamping threshold activation per I/O voltage level without active switching logic
Expected Effect : Device count reduced to 1; junction temp <120°C at 600W; adaptability 5-18V
Risk Control :
  • die-to-die thermal coupling causing cross-heating
  • wire bond reliability under repetitive surge stress
  • package assembly yield for multi-die integration

Problem Direction 4 :

ImproveVoltage level discrimination precision
VS
ConstraintDevice array complexity

Inspiration 1 : Cross-domain reference

Application Principle: #6 Universality
Cross-domain applicability Assess applicability
Solid-state imaging device
Innovative Solution Refine solution

Multi-threshold integrated TVS with self-selecting breakdown voltage

Integrate multi-threshold TVS in single package
How to solve :
  • Design a monolithic TVS die with three parallel avalanche regions having breakdown voltages of 5.5V±2%, 7.5V±2%, and 15V±2%, each serving dedicated I/O voltage domains without external switching logic
  • Embed passive voltage-sensing resistor dividers (tolerance ±0.5%) directly in the package substrate that route incoming signals to the appropriate avalanche region based on DC bias level—3.3V lines connect to 5.5V region, 5V lines to 7.5V region, 12V lines to 15V region
  • Implement shared thermal slug beneath all three regions with copper thickness ≥0.6mm and thermal conductivity ≥200 W/(m·K), distributing 600W transient energy across combined die area to maintain junction temperature <125°C
Expected Effect : Discrimination accuracy ±0.3V; device count reduced from 5-8 to 1; false trigger rate <0.1%; junction temp <120°C at 600W
Risk Control :
  • breakdown voltage drift over temperature
  • resistor divider tolerance accumulation
  • thermal coupling between avalanche regions

Problem Direction 5 :

ImproveClamping voltage adaptability range
VS
ConstraintMust not deteriorate

Inspiration 1 : Cross-domain reference

Application Principle: #1 Segmentation
Cross-domain applicability Assess applicability
Attraction component generating device and method for controlling the same
Innovative Solution Refine solution

Spatially-segmented TVS array with voltage-domain-specific clamping zones

Divide PCB into voltage-domain zones with dedicated TVS devices per zone
How to solve :
  • Partition I/O connector layout into three spatial protection zones: Zone A (3.3V lines) with 5.5V-clamp TVS, Zone B (5V lines) with 8V-clamp TVS, Zone C (12V lines) with 15V-clamp TVS—each zone optimized independently
  • Route signal traces through corresponding zones using guard trace isolation (≥0.6mm spacing) to prevent cross-domain coupling, ensuring each line receives voltage-appropriate protection
  • Implement zone-specific ground planes beneath each TVS cluster connected via 10Ω resistors to main ground, enabling localized transient energy dissipation while maintaining signal integrity (return loss <-20dB)
Expected Effect : False trigger rate <0.1%, protection coverage 3.3V–12V, device count +2 per zone vs +5–8 per line
Risk Control :
  • trace routing congestion between zones
  • ground plane segmentation affecting EMI performance
  • thermal hotspot formation in high-density zones
Patsnap Eureka Solution