Standard vias, shared interlayer dielectrics, and dummy features let magnetoresistive cells fit standard IC flows with fewer added steps.
Combining SOT and STT switching cuts write current in high-barrier MRAM bits while preserving data retention and endurance.
A tunable magnonic crystal device filters spin wave spectral components using a magneto-electric cell to adjust magnetic properties via control voltage.
A magnetic memory element uses a tantalum cap layer to reduce the effective diamagnetic field acting on the memory layer.
A semiconductor fin enclosure confines ferromagnetic material to define memory cell features without photolithography.
A Hall sensor stabilizes magnetic sensitivity against temperature drift by using a gate electrode to modulate carrier concentration in the active area.