Program Saving/Restoring TRIZ Cases
- Time-Grid Buffering for Deterministic Multi-Unit Data Processing
Clocked buffer memories enable copy-free deterministic data exchange between processing units with non-coherent memory access.
- Microarchitectural Scratchpad State Restore for Fast Context Switching
Buffered microarchitectural register states let a processor resume pattern context after context switches without repeated warm-up latency.
- Microarchitectural Scratchpads for Fast Program State Restoration
Scratchpad-stored microarchitectural register states cut context-switch warm-up latency and preserve pattern context during program restoration.
- Compacted Context State Management via Dynamic Save Area Layout
Dynamic save area layout adapts to enabled features, eliminating memory waste from fixed layouts while maintaining fast context switching.
- Thread Resource Distribution via Lock State Verification
A thread management system distributes computing resources by verifying lock information for memory regions before access.
- Reconfigurable Processing Grid Thread Context Management
Context storage preserves thread states on a reconfigurable processing grid to enable immediate execution of other concurrent threads.
- Multi-threaded Processing Context Switch Reduction
Pre-emption notification and no-context-save yield mechanisms reduce context switching overhead, improving processing speed for Cell processor threads.
- Memory Module Context Switching via Link Prefetch
Access control circuit writes context and link numbers to storage units, resolving interrupt delays by prefetching required task data.