10G-PON Downstream Frame Synchronization with HEC Protection

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Solution Overview

Problem

Existing PON systems face challenges in maintaining transmission synchronization and error detection/correction, particularly in high-bandwidth applications like 10 Gigabit PONs, where additional synchronization information is needed but not protected by FEC schemes.

Innovation Solution

Implementing a framing mechanism that includes FEC codewords for error correction and additional non-FEC encoded bytes with HEC encoding for synchronization information, ensuring robust error detection and correction within a 125 microsecond window.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If additional non-FEC encoded bytes with HEC encoding are added for synchronization information, then synchronization reliability is improved, but frame structure complexity increases

Engineering Contradiction:
Improvesynchronization reliabilityVSAvoidframe structure complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The frame structure is segmented into distinct functional areas: FEC-encoded data payload and separate non-FEC encoded synchronization bytes with HEC protection. This segmentation allows independent optimization of each section - the data portion uses robust FEC while the synchronization portion uses simpler HEC encoding, resolving the contradiction between reliability and complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different error protection mechanisms are applied to different parts of the frame based on their specific requirements. The synchronization information bytes use HEC encoding which is simpler and more suitable for frequent synchronization patterns, while the main data payload uses comprehensive FEC. This local differentiation improves overall system reliability without uniformly increasing complexity.

Inventive Principle:
Principle #3Local quality

2Reliability

If HEC encoding is used for synchronization information, then error detection capability is improved, but processing overhead increases

Engineering Contradiction:
Improveerror detection capabilityVSAvoidprocessing overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

HEC encoding is applied selectively only to the synchronization information bytes rather than the entire frame. This partial application provides sufficient error detection capability for synchronization purposes without the excessive processing overhead of applying full FEC encoding to all data, resolving the contradiction between error detection capability and processing overhead.

Inventive Principle:
Principle #16Partial or excessive action

3Productivity

If synchronization information is not protected by FEC, then bandwidth efficiency is improved, but transmission reliability deteriorates

Engineering Contradiction:
Improvebandwidth efficiencyVSAvoidtransmission reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The error protection parameter is changed from full FEC encoding to HEC encoding specifically for synchronization information. This parameter change maintains bandwidth efficiency by using less redundant encoding while still providing adequate transmission reliability for synchronization data through the HEC error detection and correction capabilities.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentEP3447947B1Header error control protected ten gigabit passive optical network downstream frame synchronization pattern
Publication Date: 2025.08.20 HUAWEI TECH CO LTD
  • EP3447947B1 patent drawingFigure 1
  • EP3447947B1 patent drawingFigure 2
  • EP3447947B1 patent drawingFigure 3

AI summary

An apparatus comprising an optical line terminal (OLT) configured to couple to a plurality of optical network units (ONUs) and transmit a plurality of downstream frames to the ONUs, wherein each of the downstream frames comprises a plurality of forward error correction (FEC) codewords and a plurality of additional non-FEC encoded bytes that comprise synchronization information that is protected by Header Error Control (HEC) code. An apparatus comprising a processing unit configured to arrange control data, user data, or both into a plurality of FEC codewords in a downstream frame and arrange a physical synchronization sequence (PSync), a superframe structure, and a Passive Optical Network-identifier (PON-ID) structure in a plurality of additional non-FEC encoded bytes in the downstream frame, and a transmission unit configured to transmit the FEC codewords and the additional non-FEC encoded bytes in the downstream frame within a 125 microsecond window.