MIL-STD-1553 Bus Fault Injection With Real-Time Bitwise Message Override

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Solution Overview

Problem

Current methods for testing MIL-STD-1553 communication buses in aircraft and other systems face challenges such as data staleness due to buffering entire messages, retransmission delays, and the need for complex software changes, which violate electrical signal requirements and do not accurately represent real-time messaging.

Innovation Solution

A data injector system using a field programmable gate array (FPGA) to modify bus traffic bitwise, allowing real-time monitoring and fault insertion without altering messaging timing, and complying with MIL-STD-1553 standards by using pattern matching and bit override tables.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If entire messages are buffered for testing, then fault insertion capability is improved, but data staleness occurs and real-time messaging is not accurately represented

Engineering Contradiction:
Improvefault insertion capabilityVSAvoiddata staleness
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The message is segmented into individual bits that are processed and forwarded in real-time, rather than buffering entire messages. This allows fault insertion at the bit level while maintaining real-time data flow and eliminating data staleness.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Fault insertion rules are pre-configured in the system, allowing the device to automatically apply faults to incoming messages in real-time without buffering or polling. The preliminary configuration enables immediate fault injection as messages pass through.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If complex software changes are made for testing, then testing coverage is improved, but electrical signal requirements are violated and real-time messaging is altered

Engineering Contradiction:
Improvetesting coverageVSAvoidelectrical signal compliance
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A dedicated fault injection device is introduced as an intermediary between the bus controller and remote terminals. This intermediary applies faults at the electrical signal level without requiring software changes, maintaining compliance with MIL-STD-1553 electrical requirements while achieving comprehensive testing coverage.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces software-based fault injection with a hardware-based fault injection device that operates at the electrical signal level. This substitution eliminates the need for complex software changes and ensures compliance with electrical signal requirements while maintaining testing effectiveness.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

3Speed

If bitwise modification is implemented, then real-time processing is improved, but device complexity increases

Engineering Contradiction:
Improvereal-time processing speedVSAvoidinjector complexity
Core Design Contradiction:
SpeedVSDevice complexity

Solution Approach 1:

The system uses pre-configured parameter tables (pattern matching tables and bit override tables) that define fault injection behavior. This approach simplifies the real-time processing logic by replacing complex algorithms with table lookups and straightforward bit manipulation operations.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The fault injection device creates and uses lookup tables that copy and store pre-defined fault patterns and override rules. This copying approach allows the system to perform complex fault injection logic through simple table lookups during real-time operation, reducing processing complexity.

Inventive Principle:
Principle #26Copying

Data Source

PatentUS12487898B2Injection for fault insertion and integration testing
Publication Date: 2025.12.02 RAYTHEON CO
  • US12487898B2 patent drawing
  • US12487898B2 patent drawing
  • US12487898B2 patent drawing

AI summary

A method includes obtaining a portion of an original message in first bus traffic or second bus traffic transmitted over a communication bus by a bus controller or a remote terminal, respectively. The portion of the original message includes at least one bit. The method also includes, in response to determination that the portion of the obtained original message corresponds to a pattern in a pattern matching table, determining a specified bit that corresponds to the pattern based on a bit override table. The method further includes modifying the specified bit within the obtained original message to generate a modified message. In addition, the method includes outputting the modified message to the second bus bitwise when the original message is obtained from the first bus traffic or outputting the modified message to the first bus bitwise when the original message is obtained from the second bus traffic.