17B/20B Coding for Low-Latency Serial Memory Links
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Solution Overview
Problem
Conventional data communication coding techniques, such as 8 B/10 B coding, result in high latency due to the need for DC-balancing, which is undesirable in mobile devices where memory performance is critical and DC-balancing is not necessary, especially in Serial Port Memory Technology (SPMT) that uses high-speed serial links.
Innovation Solution
A 17 B/20 B coding system is introduced that maintains a maximum run length of 5 bits or less, allowing for efficient encoding and decoding without the need for DC-balancing, thereby reducing latency and improving memory performance by using a 17 B/20 B encoder/decoder to partition and code data using serial lines for communication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If 8 B/10 B coding is used to ensure DC-balancing, then compatibility with AC-coupled serial links is improved, but latency increases significantly
Solution Approach 1:
The patent extracts the DC-balancing requirement from the coding system by using DC-coupled serial links instead of AC-coupled links. This removes the constraint that forced the use of complex 8B/10B coding, allowing simpler coding schemes to be used while maintaining compatibility. The harmful constraint (DC-balancing requirement) is taken out of the system by changing the coupling method.
Solution Approach 2:
The patent changes the coupling parameter from AC-coupled to DC-coupled serial links. This parameter change eliminates the need for DC-balanced coding, allowing the use of simpler coding schemes with lower latency. The change in coupling type fundamentally alters the requirements for data encoding, enabling the use of more efficient coding methods.
2Reliability
If 8 B/10 B coding is used to guarantee maximum run length, then bit error rate is reduced, but memory performance deteriorates
Solution Approach 1:
The patent extracts the maximum run length constraint from the coding system by using DC-coupled serial links that do not require run length limitations. This allows the use of simpler coding schemes that do not impose artificial constraints on data patterns, thereby improving memory performance while maintaining reliability through the DC-coupled transmission medium.
Solution Approach 2:
The patent changes the transmission medium parameter from AC-coupled to DC-coupled serial links, which fundamentally changes the requirements for run length control. DC-coupled links can handle long runs of identical bits without the problems that AC-coupled links encounter, allowing simpler coding with better memory performance while maintaining bit error rate performance.
3Adaptability or versatility
If DC-balancing is implemented in coding, then compatibility with serial links is improved, but coding complexity increases
Solution Approach 1:
The patent extracts the DC-balancing requirement from the coding process by changing the serial link coupling method to DC-coupled. This removes the need for complex DC-balancing algorithms and cascaded calculations, significantly reducing coding complexity while maintaining compatibility with serial links through the DC-coupled interface.
Solution Approach 2:
The patent changes the coupling parameter from AC-coupled to DC-coupled serial links, which eliminates the need for DC-balanced coding. This parameter change allows the use of simpler coding schemes that do not require complex algorithms to maintain DC balance, thereby reducing coding complexity while preserving serial link compatibility.
Data Source
AI summary
A method, apparatus and system employing a 17B/20B coder is disclosed. The 17B/20B coder to receive an incoming stream including a 17B block and a 20B block, and partition the 17B block into first blocks, and partitioning the 20B into second blocks. The coder is further to code 17B to 20B of memory using one or more serial lines for communication is performed, wherein coding includes coding the first blocks of the 17B block and the second blocks of the 20B block, wherein the coding of the first and second blocks is performed such that a maximum run length is maintained.