1T1R Hamming Weight Calculation With Resistive Switching
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Solution Overview
Problem
Conventional methods for calculating Hamming weight in digital circuits require a large number of full-adders and half-adders, resulting in a large circuit scale and high power consumption.
Innovation Solution
A Hamming weight calculation method based on a one-memory one-transistor (1T1R) structure, where a controller adjusts the gate voltage of a transistor and the resistance state of a memory to determine the Hamming weight without needing a large quantity of full-adders and half-adders, using a 1T1R structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If conventional POPCNT instruction is implemented using full-adders and half-adders, then Hamming weight calculation can be performed, but circuit scale becomes large and power consumption increases
Solution Approach 1:
The patent replaces the conventional mechanical logic circuit system (full-adders and half-adders) with a magnetic domain system using TMR effect. The Hamming weight calculation is performed by mapping binary data to magnetic states and using magnetic domain wall motion to perform the counting operation, thereby reducing circuit complexity and scale.
Solution Approach 2:
The patent changes the physical parameter domain from electrical logic levels to magnetic domain states. By utilizing the TMR effect and magnetic domain wall position as the operating parameters, the system achieves Hamming weight calculation with reduced circuit complexity compared to conventional electrical logic circuits.
2Productivity
If conventional POPCNT instruction is implemented using full-adders and half-adders, then Hamming weight calculation can be performed, but power consumption becomes high
Solution Approach 1:
The patent replaces the power-intensive electrical logic circuit system with a magnetic domain-based system. The TMR effect enables detection of magnetic domain wall positions with minimal power consumption, and the magnetic domain wall motion performs the calculation function without requiring continuous electrical power for logic operations.
Solution Approach 2:
By changing from electrical voltage/current parameters to magnetic domain state parameters, the system achieves lower power consumption. The magnetic domain walls maintain their states without continuous power supply, and the TMR read operation consumes minimal power compared to the continuous power required by logic gates.
3Device complexity
If 1T1R structure is used for Hamming weight calculation, then circuit scale is reduced and power consumption is reduced, but the calculation method must rely on magnetic domain control
Solution Approach 1:
The patent introduces magnetic domain walls as intermediary carriers to perform the Hamming weight calculation. The domain walls act as mediators between the binary data inputs and the calculation output, enabling the 1T1R structure to perform complex counting operations through simple magnetic state transitions and TMR detection.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces the circuit scale and power consumption while efficiently calculating Hamming weights, improving scalability and implementability.
Implementation Method 1
the controller adjusts a first gate voltage of the first transistor based on first bit data in a first binary sequence that is taken as input, to control an on-off state of the first transistor
Implementation Method 2
the controller controls a target resistance state of the first memory based on the on-off state of the first transistor. When the first transistor is in the on state, the target resistance state of the first memory is a high resistance state; and when the first transistor is in the off state, the target resistance state of the first transistor is a low resistance state
Data Source
AI summary
The present application discloses a Hamming weight calculation method performed by an operation apparatus. The operation apparatus includes a controller and a first calculator, wherein the controller sets an initial resistance state of the first memory to a low resistance state; determines a first gate voltage of the first transistor based on first bit data in a first binary sequence, and control an on-off state of the first transistor based on the first gate voltage; controls a target resistance state of the first memory based on the on-off state of the first transistor; and determines a Hamming weight of the first bit data based on a first output current on the source of the first transistor.


