256-bit Multiplication via 64-bit Segmentation and Register Accumulation

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Solution Overview

Problem

Current computer technologies face challenges in efficiently processing large-scale high-precision data operations, such as 256-bit modular multiplication, due to the limited range of basic numerical data types provided by programming languages, which hinders efficient data processing and cryptography operations.

Innovation Solution

A computer data processing method that splits 256-bit numbers into four 64-bit numbers and performs multiplication using a specific rule, grouping data pairs and accumulating results within each group to minimize register usage and optimize calculations, allowing for efficient 256-bit multiplication without relying on caches or memory access.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If basic numerical data types provided by programming languages are used, then the implementation is simple, but the range is limited and cannot satisfy large-scale high-precision numerical calculation

Engineering Contradiction:
Improvenumerical precisionVSAvoiddata structure complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent segments a 256-bit large number into four 64-bit segments (a[3], a[2], a[1], a[0]) and another 256-bit number into four 64-bit segments (b[3], b[2], b[1], b[0]). This segmentation allows the use of standard 64-bit data types while achieving 256-bit precision through structured combination of segments, resolving the contradiction between precision requirements and data type limitations.

Inventive Principle:
Principle #1Segmentation

2Productivity

If traditional multiplication methods for large numbers are used, then the calculation is accurate, but the processing speed is slow due to frequent memory access

Engineering Contradiction:
Improvemultiplication speedVSAvoidregister management complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent merges multiple multiplication operations into a unified register-based computation process. Seven groups of data pairs are multiplied and accumulated using register operations, combining what would traditionally require multiple memory accesses into a single streamlined register workflow, thereby improving speed while managing complexity through systematic organization.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent performs preliminary grouping of data pairs into seven specific groups before multiplication. This preliminary organization allows the subsequent multiplication and accumulation steps to proceed efficiently using register operations without requiring intermediate memory accesses, as all necessary data is prepared and staged in registers beforehand.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If all multiplication results are accumulated in registers, then the calculation is fast, but the register usage exceeds available registers

Engineering Contradiction:
Improvecalculation efficiencyVSAvoidregister quantity
Core Design Contradiction:
ProductivityVSQuantity of substance

Solution Approach 1:

The patent discards multiplication results from groups 1-6 after they have been accumulated into the final result, recovering register space for subsequent operations. Only the essential accumulation state is retained in registers, while intermediate results are discarded after use. This allows the computation to proceed with limited register resources while maintaining calculation efficiency.

Inventive Principle:
Principle #34Discarding and recovering

Data Source

PatentUS10782933B2Computer data processing method and apparatus for large number operations
Publication Date: 2020.09.22 ADVANCED NEW TECHNOLOGIES CO LTD
  • US10782933B2 patent drawing
  • US10782933B2 patent drawing
  • US10782933B2 patent drawing

AI summary

Implementations of this specification provide a method and apparatus for computer data processing for large number operations. An example method performed by a computing device includes splitting a multiplier and a multiplicand into respective four 64-bit numbers from most significant bits to least significant bits; reading the split multipliers and the split multiplicands into a register; and obtaining a multiplication processing result for the multiplier and the multiplicand by performing operations including: classifying the split multipliers and the split multiplicands into groups of data pairs, calculating multiplication results of the groups of data pairs one by one, performing accumulation on multiplication results of data pairs in each group, and storing an accumulation result corresponding to the data pairs in memory as the multiplication processing result for the multiplier and the multiplicand.