2D Channel Transistor Structure With Adhesion and Sulfidation Control

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Solution Overview

Problem

Current semiconductor devices face challenges in performance scalability due to the limitations of silicon-based transistors, and alternative materials like Ge and III-V semiconductors are costly and difficult to scale effectively.

Innovation Solution

The manufacturing process involves forming transistors with a planar-like or fin-like structure using 2D layered channel materials on silicon substrates, with conductive elements and a semiconductor layer that promote adhesion and reduce sulfidation, enhancing performance and yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If alternative semiconductor materials like Ge and III-V semiconductors are used, then performance scalability is improved, but manufacturing cost increases and scalability difficulty increases

Engineering Contradiction:
Improveperformance scalabilityVSAvoidmanufacturing cost
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The patent employs composite material structures including 2D layered channel materials combined with conductive elements and semiconductor layers. This composite approach enables high performance scalability while using cost-effective silicon substrates, avoiding the need for expensive alternative materials like Ge and III-V semiconductors.

Inventive Principle:
Principle #40Composite materials

Solution Approach 2:

The patent changes the physical and chemical parameters of the semiconductor structure by introducing 2D layered materials with specific properties (thickness, conductivity, adhesion characteristics) to achieve performance improvements through parameter optimization rather than material substitution.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If alternative semiconductor materials like Ge and III-V semiconductors are used, then performance scalability is improved, but device complexity increases

Engineering Contradiction:
Improveperformance scalabilityVSAvoidscalability difficulty
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent segments the semiconductor device into distinct functional layers: 2D layered channel materials, conductive elements, semiconductor layers, and dielectric layers. This segmentation allows each component to be optimized independently and simplifies the manufacturing process, reducing scalability difficulty.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The conductive elements serve multiple functions: they provide electrical conductivity, promote adhesion between layers, and reduce sulfidation. This multi-functionality reduces device complexity by eliminating the need for separate components for each function.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Reliability

If 2D layered channel materials are used with conductive elements, then adhesion is improved and sulfidation is reduced, but manufacturing process complexity increases

Engineering Contradiction:
ImproveadhesionVSAvoidmanufacturing process complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The conductive elements are formed in advance before the semiconductor layer is deposited. This preliminary action ensures proper adhesion promotion and sulfidation reduction are established before subsequent manufacturing steps, simplifying the overall process.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The conductive elements act as an intermediary layer between the 2D layered channel materials and the semiconductor layer. This intermediary promotes adhesion and reduces sulfidation, simplifying the interface management between different materials.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS11757045B2Semiconductor device and method of manufacturing the same
Publication Date: 2023.09.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US11757045B2 patent drawing
  • US11757045B2 patent drawing
  • US11757045B2 patent drawing

AI summary

A semiconductor device includes a substrate, a first poly-material pattern, a first conductive element, a first semiconductor layer, and a first gate structure. The first poly-material pattern is over and protrudes outward from the substrate, wherein the first poly-material pattern includes a first active portion and a first poly-material portion joined to the first active portion. The first conductive element is over the substrate, wherein the first conductive element includes the first poly-material portion and a first metallic conductive portion covering at least one of a top surface and a sidewall of the first poly-material portion. The first semiconductor layer is over the substrate and covers the first active portion of the first poly-material pattern and the first conductive element. The first gate structure is over the first semiconductor layer located within the first active portion.