2D Semiconductor Channel in Ferroelectric Memory Suppresses Depolarization
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Solution Overview
Problem
Ferroelectric field-effect transistor (FeFET) memory devices suffer from poor non-volatile properties due to depolarization fields, which cause information leakage, despite advancements in materials like MoS2 and HfO2, as the depolarization effect persists, limiting their retention and endurance characteristics.
Innovation Solution
A non-volatile memory device is developed with a 2D semiconductor channel layer, such as MoS2, in direct contact with a high-k layer like strontium titanate (STO), which suppresses the depolarization field by geometry, ensuring minimal voltage drop and enhanced retention characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Duration of action of stationary object
If a ferroelectric material is used as gate dielectric in FeFET to achieve non-volatile memory function, then the memory device can store information without power, but the depolarization field causes information leakage and poor retention characteristics
Solution Approach 1:
A 2D semiconductor channel layer is introduced as an intermediary between the ferroelectric gate dielectric and the substrate. This intermediate layer suppresses the depolarization field that causes information leakage, thereby improving data retention while maintaining the non-volatile memory function. The 2D channel layer acts as a mediator that resolves the conflict between ferroelectric polarization stability and depolarization field effects.
Solution Approach 2:
The patent employs a composite structure combining ferroelectric material (for non-volatile storage), 2D semiconductor channel material (for suppressing depolarization), and high-k dielectric material (for enhancing gate control). This multi-material composite approach synergistically addresses the retention issue by combining the advantages of each material while mitigating their individual limitations.
2Adaptability or versatility
If the ferroelectric gate dielectric is polarized to shift threshold voltage for memory operation, then binary information can be stored, but the polarization charge creates depolarization field that works against the polarization and causes cell discharge
Solution Approach 1:
The 2D semiconductor channel layer serves as a mediator that reduces the depolarization field strength acting on the ferroelectric polarization. By placing this intermediate layer between the ferroelectric gate and the substrate, the system maintains threshold voltage shifting capability for binary storage while reducing the opposing depolarization field that causes unreliable cell discharge.
3Device complexity
If conventional FeFET structure is used to reduce device size, then integration density improves, but the depolarization effect persists limiting retention and endurance characteristics
Solution Approach 1:
The patent uses a composite material architecture integrating ferroelectric gate dielectric, 2D semiconductor channel, and high-k dielectric layers. This composite structure maintains compact device dimensions for high integration density while the specific combination of materials (particularly the 2D channel and high-k dielectric) suppresses depolarization effects, thereby improving both retention time and endurance characteristics.
Solution Approach 2:
The patent transitions from conventional bulk semiconductor channels to two-dimensional semiconductor channel materials. This dimensional change enables better control of depolarization field effects while maintaining small device footprint. The 2D nature of the channel material provides enhanced interface control and reduced leakage paths, improving retention and endurance without increasing device size.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution provides a high-quality, long-retention ferroelectric FET with improved non-volatile properties by eliminating the depolarization field, allowing for superior scaling and reduced information leakage, thus addressing the limitations of existing FeFET memory devices.
Implementation Method 1
a high-k layer like strontium titanate (STO), which suppresses the depolarization field by geometry
Implementation Method 2
the ferroelectric material, which serves as the gate dielectric, is programmed, the gate dielectric is polarized in such a way that the threshold voltage is shifted
Data Source
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Figure 5
AI summary
A non-volatile memory device is disclosed comprising a high dielectric constant layer (high-k) layer or a metal layer (34) on a semiconductor substrate (45); a two-dimensional (2D) semiconductor channel layer (33) interposed between the high-k layer or metal layer and a ferroelectric layer (32); a metal gate layer (31) on the ferroelectric layer; a source region (41) and a drain region (42) being electrically coupled to the 2D semiconductor channel layer.