2D Channel Layer Growth Using Interfacial Energy Patterning

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Solution Overview

Problem

The miniaturization of semiconductor devices leads to performance limitations due to scaling issues with 3D bulk materials, particularly silicon channels, which result in mobility degradation and short channel effects, while 2D layered materials offer improved performance but face challenges such as random growth and physical property changes during manufacturing.

Innovation Solution

A method of forming a 2D channel layer using substrates with varying interfacial energies, where a second substrate with lower interfacial energy is used to selectively grow a 2D semiconductor material layer, preventing random growth and allowing for precise shaping of the channel layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If 2D layered material is used to overcome scaling limitations, then device performance is improved, but random growth and physical property changes occur during manufacturing

Engineering Contradiction:
Improvedevice performanceVSAvoidchannel layer growth control
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

A sacrificial substrate is introduced as an intermediary between the final device structure and the 2D material growth process. The sacrificial substrate enables controlled epitaxial growth of the 2D channel layer through lattice matching, then is removed to leave a precisely defined channel structure without random growth

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The sacrificial substrate is prepared in advance with specific crystal orientation and lattice parameters that match the 2D material being grown. This preliminary preparation ensures that when 2D material is deposited, it grows in a controlled manner following the substrate's crystal structure, preventing random growth directions

Inventive Principle:
Principle #10Preliminary action

2Length of moving object

If channel thickness is reduced to overcome scaling limitations, then short channel effect is reduced, but manufacturing precision and shape control become more difficult

Engineering Contradiction:
Improvechannel thicknessVSAvoidchannel shape definition
Core Design Contradiction:
Length of moving objectVSManufacturing precision

Solution Approach 1:

The sacrificial substrate provides locally optimized crystal structure and surface properties at the growth interface, enabling precise control of 2D material thickness and shape. The substrate's lattice structure locally guides the 2D material growth to follow desired patterns while maintaining atomic-level thickness control

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The sacrificial substrate acts as a mediator that translates macroscopic patterning intentions into atomic-level 2D material structures. By controlling the substrate's geometry and crystal orientation, the final 2D channel shape and thickness are precisely defined during growth

Inventive Principle:
Principle #24Intermediary (Mediator)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the formation of 2D channel layers with consistent thickness and shape, enhancing the reliability and performance of semiconductor devices by overcoming scaling limitations and manufacturing challenges.

Implementation Method 1

a sacrificial substrate, and a two-dimensional (2D) channel layer on the second substrate. An interfacial energy of the second substrate may be less than an interfacial energy of the first substrate

Methodology Applied
Scientific EffectEpitaxy: Epitaxy

Implementation Method 2

the 2D channel layer may be formed by transforming a liquid precursor layer

Methodology Applied
Scientific EffectLattice matching:

Data Source

PatentUS20240038845A1Layer structures including two-dimensional channel layer, methods of manufacturing the same, electronic devices including 2d channel layer, and electronic apparatuses including electronic device
Publication Date: 2024.02.01 SAMSUNG ELECTRONICS CO LTD
  • US20240038845A1 patent drawing
  • US20240038845A1 patent drawing
  • US20240038845A1 patent drawing

AI summary

A layer structure including a two-dimensional (2D) channel layer, a method of manufacturing a two-dimensional (2D) channel layer, an electronic device including the layer structure, and an electronic apparatus including the layer structure are disclosed. The layer structure may include a first substrate, a second substrate surrounded by the first substrate, and a 2D channel layer on the second substrate. An interfacial energy of the second substrate may be less than an interfacial energy of the first substrate. The method of manufacturing a 2D channel layer may include forming a second substrate to be surrounded by a first substrate, forming a precursor layer for forming a 2D channel on any one of the first and second substrates, and transforming the precursor layer into a liquid precursor layer. The interfacial energy of the second substrate may be less than the interfacial energy of the first substrate.