2D Semiconductor Contacts With Intercalation to Reduce Fermi Level Pinning

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Solution Overview

Problem

The semiconductor industry faces challenges in reducing Fermi Level Pinning (FLP) at the interface between metal contacts and 2D material layers in field effect transistors, which limits the ability to change transistor properties, and the use of metals with high work function can damage integrated circuit devices during the electron gun evaporation process.

Innovation Solution

A semiconductor device is fabricated using a first 2D material layer, such as graphene, and a second 2D material layer, like transition metal dichalcogenide, with a van der Waals contact, and an intercalation process is performed on the first 2D material layer to change its work function, allowing for the formation of n-type or p-type FETs by controlling the intercalation process, thereby resolving FLP and avoiding damage to the device.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If metals with high work function are used to form contacts with 2D material layers, then the Fermi Level Pinning (FLP) is reduced and transistor properties can be changed, but the electron gun evaporation process damages the integrated circuit devices

Engineering Contradiction:

Improveability to change transistor propertiesVSAvoiddamage to integrated circuit devices

Core Design Contradiction:

Adaptability or versatilityVSObject-affected harmful factors

Solution Approach 1:

The patent uses a 2D material layer (such as graphene or other two-dimensional materials) as an intermediary between the metal contact and the underlying semiconductor structure. This intermediary layer has a higher work function than conventional metals and can be deposited without damaging the integrated circuit, while still effectively reducing Fermi Level Pinning and enabling transistor property modulation.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent changes the work function parameter of the contact layer by using 2D materials with inherently higher work functions compared to conventional metals. This parameter change allows for effective FLP reduction and transistor property control without requiring the high-energy electron gun evaporation process that causes damage.

Inventive Principle:

Principle #35Parameter changes

2Ease of manufacture

If conventional metals are used to form contacts with 2D material layers, then the fabrication process is simpler, but Fermi Level Pinning (FLP) limits the ability to change transistor properties

Engineering Contradiction:

Improvefabrication process simplicityVSAvoidability to change transistor properties

Core Design Contradiction:

Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The 2D material layer serves as a mediator that combines the benefits of both conventional metals and high work function materials. It maintains fabrication compatibility while enabling effective FLP reduction and transistor property control, thus resolving the contradiction between ease of manufacture and adaptability.

Inventive Principle:

Principle #24Intermediary (Mediator)

3Adaptability or versatility

If the work function of the 2D material layer is increased to reduce FLP, then transistor property control improves, but the risk of damaging the device during deposition increases

Engineering Contradiction:

Improvetransistor property controlVSAvoiddevice integrity

Core Design Contradiction:

Adaptability or versatilityVSReliability

Solution Approach 1:

The 2D material layer is a robust intermediary that can be deposited using low-energy processes, avoiding device damage while achieving the necessary work function increase for effective FLP reduction and transistor property control.

Inventive Principle:

Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces the mechanical/electrical stress of high-energy electron gun evaporation with gentler deposition methods suitable for 2D materials, thereby maintaining device integrity while achieving the desired electrical property modifications.

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enables the fabrication of n-type and p-type FETs by adjusting the work function of the 2D material layer, improving transistor performance and resolving Fermi Level Pinning issues while preventing damage to the integrated circuit.

Implementation Method 1

a first 2D material layer, such as graphene, and a second 2D material layer, like transition metal dichalcogenide, with a van der Waals contact

Methodology Applied

Scientific EffectVan der Waals contact: Van der Waals Force

Implementation Method 2

an intercalation process is performed on the first 2D material layer to change its work function, allowing for the formation of n-type or p-type FETs by controlling the intercalation process

Methodology Applied

Scientific EffectIntercalation:

Data Source

PatentUS20250015141A1Semiconductor device and formation method thereof

Publication Date: 2025.01.09 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

A semiconductor device includes a substrate, a first dielectric layer, a channel layer and source/drain electrodes. The first dielectric layer is over the substrate. The channel layer is over the first dielectric layer. Source/drain electrodes are over the channel layer. The source/drain electrodes comprise a 2D semimetal material. The channel layer comprises a 2D semiconductor material interfacing the 2D semimetal material of the source/drain electrodes.