2D Semiconductor Contacts Using Metal Borides to Cut Interface Resistance
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Solution Overview
Problem
Current semiconductor devices face challenges in reducing contact resistance and defects when integrating two-dimensional (2D) semiconductor materials with metal electrodes, leading to performance degradation due to Fermi-level pinning and defect-induced gap states.
Innovation Solution
Incorporating metal boride compounds, such as TiB2, ZrB2, and HfB2, as conductive layers in contact with 2D semiconductor materials to form edge or planar contacts, which reduce contact resistance and defects by forming Van der Waals bonds and adjusting work functions to match the 2D semiconductor material, thereby improving mobility and reducing Fermi-level pinning.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal electrodes are directly integrated with 2D semiconductor materials, then device integration is achieved, but contact resistance increases and performance degrades due to Fermi-level pinning and defect-induced gap states
Solution Approach 1:
The patent introduces metal boride compounds (TiB2, ZrB2, HfB2) as intermediate conductive layers between metal electrodes and 2D semiconductor materials. These intermediary layers form Van der Waals bonds with the 2D materials, adjusting work functions to match and eliminate Fermi-level pinning, while preventing defect-induced gap states at the interface, thereby significantly reducing contact resistance.
Solution Approach 2:
The patent employs composite material structures combining metal boride compounds with 2D semiconductor materials. The metal boride layer (5-50 nm thickness) is integrated with the 2D material channel to create a hybrid interface that leverages the beneficial properties of both materials: the metallic conductivity of borides and the semiconducting properties of 2D materials, achieving low contact resistance and high mobility.
2Productivity
If the size of semiconductor devices is reduced, then the number of devices that may be integrated in one wafer increases and driving speed increases, but performance degradation occurs due to contact resistance and defects
Solution Approach 1:
The metal boride conductive layer serves as a mediator that maintains reliable electrical contact in miniaturized devices. By forming Van der Waals bonds and matching work functions, it ensures consistent low contact resistance across scaled-down device geometries, enabling high-density integration without performance degradation.
Solution Approach 2:
The patent optimizes the thickness parameter of the metal boride layer (5-50 nm) to achieve the desired balance between conductivity and interface quality. This parameter control allows the device to maintain excellent electrical properties even as overall device dimensions are reduced for higher integration density.
3Reliability
If metal boride conductive layers are used to reduce contact resistance, then electrical properties and stability are enhanced, but device structure complexity increases
Solution Approach 1:
The patent utilizes thin film technology to deposit metal boride layers (5-50 nm thickness) as flexible, conformal coatings on the 2D semiconductor surfaces. This thin-film approach adds minimal structural complexity while delivering the full benefit of work function matching and defect passivation, maintaining device simplicity despite the enhanced interface engineering.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of metal boride conductive layers significantly decreases contact resistance and defects, enhancing the electrical properties and stability of 2D semiconductor devices even at a nano-scale, maintaining high mobility and performance.
Implementation Method 1
reduce contact resistance and defects by forming Van der Waals bonds and adjusting work functions to match the 2D semiconductor material
Data Source
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AI summary
A semiconductor device may include a channel layer including a two-dimensional (2D) semiconductor material, a gate insulating layer on the channel layer, a gate electrode on the gate insulating layer, and a first conductive layer and a second conductive layer respectively on opposite sides of the channel layer. Each of the first and second conductive layers may include metal boride.