2D Semiconductor GAA Transistor Channels for Thin-Scale Mobility
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Solution Overview
Problem
As the fin width in fin field effect transistors (FinFETs) decreases, channel width variations lead to mobility loss, and scaling down silicon channel thickness in GAA transistors results in degradation of channel mobility due to increased defective channel interfaces.
Innovation Solution
The use of 2D semiconductor material as channels in GAA transistors, which allows for high electron mobility and enables scaling down the channel thickness without significant impact on carrier mobility, thereby achieving satisfactory GAA channel mobility with reduced thickness.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of moving object
If silicon channel thickness is scaled down in GAA transistors, then integration density is improved, but channel mobility degrades due to increased defective channel interfaces
Solution Approach 1:
The patent changes the material parameter from silicon to 2D semiconductor materials (such as MoS2, WS2, WSe2, MoSe2), which fundamentally alters the channel properties. This material substitution enables thin channel thickness while maintaining high carrier mobility, as 2D materials inherently possess superior mobility characteristics compared to silicon at scaled dimensions.
Solution Approach 2:
The patent employs composite material structures where 2D semiconductor channels are integrated with high-k dielectric gate insulators and metal gate electrodes. This composite approach allows the channel to benefit from the high-k material's superior gate control while maintaining the 2D material's high mobility, thus resolving the contradiction between thin channel thickness and maintained mobility.
2Area of moving object
If fin width is decreased in FinFETs, then integration density is improved, but channel width variations increase leading to mobility loss
Solution Approach 1:
The patent transitions from the two-dimensional channel structure of FinFETs to vertically stacked three-dimensional nanosheet channels in GAA transistors. This dimensional change allows the channel to extend in the vertical direction, providing additional conduction paths that compensate for reduced lateral width, thereby maintaining mobility while achieving higher integration density through vertical stacking.
Solution Approach 2:
The patent changes the channel material from silicon to 2D semiconductor materials, which fundamentally alters the electrical transport properties. This material parameter change enables the channel to maintain high carrier mobility even when lateral dimensions are reduced, as 2D materials exhibit superior mobility characteristics that are less sensitive to dimensional scaling.
3Reliability
If 2D semiconductor material is used as channel, then channel mobility is maintained at reduced thickness, but manufacturing complexity increases
Solution Approach 1:
The patent employs preliminary actions in the manufacturing process by pre-forming sacrificial semiconductor layers and dielectric layers in alternating sequences before final channel definition. This preliminary structuring simplifies subsequent processing steps, as the sacrificial layers provide built-in spacing and alignment features that guide the formation of the 2D semiconductor channels, thereby reducing overall manufacturing complexity despite the advanced material system.
Data Source
AI summary
A device comprises a plurality of 2D semiconductor nanostructures, a gate structure, a source region, and a drain region. The plurality of 2D semiconductor nanostructures extend in a first direction above a substrate and arranged in a second direction substantially perpendicular to the first direction. The gate structure surrounds each of the plurality of 2D semiconductor nanostructures. The source region and the drain region are respectively on opposite sides of the gate structure.