2D Semiconductor Gate Stack With Adhesion Layer for High-k Nucleation
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Solution Overview
Problem
The semiconductor industry faces challenges in depositing high-k dielectric layers on 2D material layers, resulting in poor nucleation and suboptimal electrical characteristics such as high subthreshold swing, effective oxide thickness, and gate leakage in field effect transistors.
Innovation Solution
An adhesion layer is introduced to improve the adhesion between the 2D material layer and the high-k gate dielectric layer, allowing for continuous film nucleation and enhancing the formation of a high-k gate dielectric stack, which reduces subthreshold swing, effective oxide thickness, and gate leakage, while increasing breakdown voltage and dielectric constant.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a high-k dielectric layer is deposited directly on a 2D material layer, then the gate dielectric layer can be formed, but poor nucleation occurs resulting in high subthreshold swing, high effective oxide thickness, and high gate leakage
Solution Approach 1:
An adhesion layer is introduced as an intermediary between the 2D material layer and the high-k gate dielectric layer. This adhesion layer serves as a mediator that enables proper nucleation of the high-k dielectric material, improving film quality and electrical characteristics without requiring direct deposition on the 2D material surface.
Solution Approach 2:
The adhesion layer is formed in advance before depositing the high-k gate dielectric layer. This preliminary action prepares the surface with appropriate properties for subsequent high-k dielectric nucleation, ensuring better film formation and reducing defects before the main dielectric layer is deposited.
2Reliability
If the adhesion layer is added to improve nucleation, then subthreshold swing and gate leakage are reduced, but the device structure becomes more complex
Solution Approach 1:
The adhesion layer is applied locally only where needed - specifically between the 2D material layer and the high-k gate dielectric layer in regions requiring improved nucleation. This localized application improves electrical characteristics without unnecessarily complicating the entire device structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The adhesion layer improves the electrical characteristics of the semiconductor device by reducing subthreshold swing, effective oxide thickness, and gate leakage, and increasing breakdown voltage and dielectric constant, leading to enhanced performance.
Implementation Method 1
An adhesion layer is introduced to improve the adhesion between the 2D material layer and the high-k gate dielectric layer
Implementation Method 2
allowing for continuous film nucleation and enhancing the formation of a high-k gate dielectric stack
Data Source
AI summary
A method of forming a semiconductor device comprises the following steps. A dielectric layer is formed over a substrate. A 2D material layer is formed over the dielectric layer. An adhesion layer is formed over the 2D material layer. Source/drain electrodes are formed on opposite sides of the adhesion layer. A first high-k gate dielectric layer is formed over the adhesion layer, wherein the adhesion layer has a material different from a material of the first high-k gate dielectric layer.