2D Logic Gate Structure With Air Gap for Stable Ambipolar Switching
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Solution Overview
Problem
The ambipolar electrical behavior of two-dimensional semiconductor materials makes it difficult to turn off logic functions within a narrow gate-voltage range, as they transition continuously between electron and hole conduction states, hindering the development of stable logic gates.
Innovation Solution
A logic gate device is designed with a structure that includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, and top electrodes, featuring an air gap between the bottom electrode and the semiconductor layer, which widens the Schottky barrier and enhances the on-off ratio and reconfigurable rectification characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 2D semiconductor materials are used to create logic gates, then the device can be turned on and off within a narrow gate-voltage range, but the continuous transition between electron and hole conduction states prevents stable logic function switching
Solution Approach 1:
The patent divides the 2D semiconductor channel into two separate segments: an n-type semiconductor segment and a p-type semiconductor segment. This segmentation allows each segment to independently control electron and hole conduction, preventing the continuous transition problem inherent in ambipolar semiconductors. The n-type segment handles electron transport while the p-type segment handles hole transport, enabling stable logic function switching with clear on/off states.
Solution Approach 2:
The patent applies different doping types to different regions of the semiconductor channel. The first region is doped to exhibit n-type behavior with electron majority carriers, while the second region is doped to exhibit p-type behavior with hole majority carriers. This local quality differentiation enables each region to optimize its conduction characteristics for specific charge carriers, resolving the ambipolar behavior issue and achieving stable logic gate operation.
2Adaptability or versatility
If surface dopants or adsorbates are used to tune the polarity of 2D semiconductors, then the electrical behavior can be adjusted, but the stability degrades and intrinsic electronic properties are compromised
Solution Approach 1:
Instead of using unstable surface dopants or adsorbates that are applied after device fabrication, the patent incorporates doping directly into the crystal growth process of the 2D semiconductors. This preliminary action during synthesis creates inherently stable n-type and p-type regions with fixed doping concentrations, eliminating the degradation issues associated with post-fabrication doping methods while maintaining the desired polarity tuning capability.
3Adaptability or versatility
If electrical contacts are used to govern transport polarity via band alignment, then electron and hole injection can be controlled, but the Fermi level pinning effect limits effectiveness
Solution Approach 1:
The patent extracts and eliminates the problematic Fermi level pinning effect by carefully selecting contact materials with appropriate work functions that avoid pinning the Fermi level at the semiconductor interface. By taking out this harmful effect, the electrical contacts can effectively govern transport polarity through controlled band alignment, enabling stable electron and hole injection without the limitations imposed by Fermi level pinning.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The device achieves a gain of about 10 for inverters and effective switching of AND/OR logic gates, with on-off ratios exceeding 10^3 and rectification ratios exceeding 10^5, demonstrating stable and efficient logic gate operation.
Implementation Method 1
featuring an air gap between the bottom electrode and the semiconductor layer, which widens the Schottky barrier and enhances the on-off ratio and reconfigurable rectification characteristics
Implementation Method 2
A 2D semiconductor material with high quality usually exhibits ambipolar electrical behavior, in which charge carriers can be switched between electrons and holes by an electrostatic field
Implementation Method 3
a gate insulating layer located on a surface of the gate electrode away from the two-dimensional semiconductor layer
Data Source
AI summary
The present application provides a logic gate device. The logic gate device includes a gate electrode, a gate insulating layer, a bottom electrode, a two-dimensional semiconductor layer, a first top electrode and a second electrode. The gate insulating layer is located on the gate electrode. The bottom electrode is located on the gate insulating layer. The two-dimensional semiconductor layer is located on the bottom electrode and simultaneously covers the gate insulating layer. The first top electrode and the second electrode are located on the two-dimensional semiconductor layer. The bottom electrode, the two-dimensional semiconductor layer and the gate insulating layer form an air gap, and the air gap is distributed at both sides of the bottom electrode. The gate electrode is configured to connect a gate voltage, and the first top electrode and the second top electrode are configured to connect a signal input terminal.