Two-Dimensional Masked Shift Instruction for Image Processing
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Solution Overview
Problem
Current image processing technologies face a trade-off between versatility and power efficiency, with general-purpose processors consuming more energy due to finer grained data handling and custom-designed processors being limited in application software development opportunities.
Innovation Solution
An image processor with a two-dimensional shift register array that includes masking logic circuitry to execute masked shift instructions, allowing for efficient data processing by specifying which array locations to write data to, thereby optimizing power usage while maintaining versatility.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If general purpose processors are used for image processing, then versatility and application software development opportunities are improved, but power consumption increases
Solution Approach 1:
The processor is segmented into specialized fixed-function circuitry blocks (e.g., convolution engines, pooling layers, normalization units) that handle specific image processing tasks. This segmentation allows the system to use highly optimized, low-power circuits for common operations while maintaining versatility through programmable control that can orchestrate different combinations of these specialized blocks for various applications.
2Use of energy by moving object
If custom designed fixed function circuitry is used, then power consumption per unit of data is reduced, but the set of performable tasks becomes limited
Solution Approach 1:
The fixed-function circuitry blocks are designed to be multi-functional through programmable configuration. For example, a single convolution engine can be reconfigured via control signals to perform different convolution operations with various kernel sizes and strides. This universality allows the system to maintain low power consumption through specialized hardware while adapting to different image processing tasks through software-controlled reconfiguration.
3Adaptability or versatility
If finer grained data structures are used in general purpose processors, then programming flexibility is improved, but energy consumption per unit of data increases
Solution Approach 1:
The patent extracts the most energy-intensive data manipulation operations from general-purpose processor cores and implements them in specialized fixed-function circuitry. For example, data shuffling, padding, and format conversion operations are handled by dedicated hardware blocks rather than software instructions, reducing the overhead of fine-grained data structure management while preserving programming flexibility at the algorithm level.
Data Source
AI summary
An image processor is described. The image processor includes a two dimensional shift register array that couples certain ones of its array locations to support execution of a shift instruction. The shift instruction is to include mask information. The mask information is to specify which of the array locations are to be written to with information being shifted. The two dimensional shift register array includes masking logic circuitry to write the information being shifted into specified ones of the array locations in accordance with the mask information.