2D Semiconductor Device with Atomic Layer Electrostatic Control

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Solution Overview

Problem

Existing semiconductor devices using stacks of 2-dimensional layers such as MoS2, MoSe2, WS2, or WSe2 suffer from low electrostatic control, high power dissipation, absence of a direct band gap, and poor tunability, limiting their effectiveness in field-effect transistors (FETs).

Innovation Solution

The use of single or double 2-dimensional layers made from materials like MoS2, MoSe2, WS2, WSe2, or WTe2 provides enhanced electrostatic control, low power dissipation, and tunability through improved band gap management, with a high-κ dielectric layer like HfO2 enhancing charge carrier mobility and allowing for efficient gate control.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If stacks of 2-dimensional layers are used in FETs, then the device can be fabricated with available materials, but electrostatic control is low and power dissipation is high

Engineering Contradiction:
Improveelectrostatic controlVSAvoidpower dissipation
Core Design Contradiction:
ReliabilityVSLoss of energy

Solution Approach 1:

The patent extracts the essential semiconducting function from thick stacks of 2-dimensional layers and concentrates it into a single atomic layer. This extraction eliminates the excess material that causes poor electrostatic control and high power dissipation, while retaining the necessary semiconducting properties for FET operation.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the critical parameter of semiconducting layer thickness from multiple layers (stacks) to a single atomic layer. This parameter change fundamentally improves electrostatic control by the gate electrode and reduces short channel effects, directly addressing the contradiction between reliability and energy loss.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If stacks of 2-dimensional layers are used, then material availability is improved, but a direct band gap is absent and tunability is poor

Engineering Contradiction:
Improveband gap tunabilityVSAvoidband gap quality
Core Design Contradiction:
Adaptability or versatilityVSReliability

Solution Approach 1:

The patent changes the band gap parameter by reducing the semiconducting layer to a single atomic layer, which induces quantum confinement effects that open a direct band gap. This parameter change enables both improved band gap quality and enhanced tunability through electric field control.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent introduces dynamic tunability of the band gap through application of transverse electric fields. The band gap can be continuously adjusted by varying the electric field strength, enabling adaptive control of device characteristics for different operating conditions.

Inventive Principle:
Principle #15Dynamics

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration results in a room-temperature on/off ratio exceeding 10^8 and ultralow standby power dissipation, enabling more efficient transistor switching and potential integration into next-generation electronics.

Implementation Method 1

the use of a HfO2 dielectric layer can increase the charge carrier mobility by a factor ̃1000

Methodology Applied
Scientific EffectDielectric screening: Dielectric

Implementation Method 2

improved electrostatic control of the gate electrode

Methodology Applied
Scientific EffectElectrostatic control: Electrostatics

Implementation Method 3

their band gap can be tuned either by a reduction of the number of layers where all the above-mentioned 2-dimensional layers have a direct band gap

Methodology Applied
Scientific EffectBand gap:

Data Source

PatentUS9608101B2Semiconductor device
Publication Date: 2017.03.28 ECOLE POLYTECHNIQUE FEDERALE DE LAUSANNE (EPFL)
  • US9608101B2 patent drawing
  • US9608101B2 patent drawing
  • US9608101B2 patent drawing

AI summary

The present invention concerns semiconductor devices comprising a source electrode, a drain electrode and a semiconducting layer consisting of a single or double 2-dimensional layer(s) made from one of the following materials: MoS2, MoSe2, WS2, WSe2, MoTe2 or WTe2. Replacing a stack by only one or two 2-dimensional layer(s) of MoS2, MoSe2, WS2, or WSe2, MoTe2 or WTe2 provides an enhanced electrostatic control, low power dissipation, direct band gap and tunability.