2D Semiconductor Contacts Using Metal Borides to Lower Resistance
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Solution Overview
Problem
Current semiconductor devices face challenges in reducing contact resistance between 2D semiconductor materials and metal electrodes due to Fermi-level pinning and defect-induced gap states, which hinder the integration of smaller, faster devices.
Innovation Solution
Incorporating metal boride compounds, such as TiB2, ZrB2, and HfB2, as conductive layers that form edge or planar contacts with 2D semiconductor channel layers, reducing contact resistance through Van der Waals bonding and minimizing defect generation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If metal electrodes are used to contact 2D semiconductor materials, then electrical connection is established, but contact resistance increases due to Fermi-level pinning and defect-induced gap states
Solution Approach 1:
The patent introduces metal boride as an intermediary layer between the metal electrode and the 2D semiconductor channel layer. This intermediate layer acts as a mediator that prevents direct harmful interaction between the metal electrode and the 2D semiconductor, thereby reducing Fermi-level pinning and defect-induced gap states while maintaining electrical connection.
Solution Approach 2:
The patent employs metal boride, a composite material formed by transition metal and boron, to create a contact layer that combines the electrical conductivity of metal with the bonding characteristics of boride compounds. This composite material structure reduces contact resistance by minimizing defects at the interface while maintaining stable electrical connection.
2Productivity
If the size of semiconductor devices is reduced to increase integration density, then the number of devices per wafer increases, but performance degradation occurs due to increased contact resistance
Solution Approach 1:
By introducing metal boride as an intermediary contact layer, the patent enables smaller device dimensions without suffering from increased contact resistance. The intermediate layer maintains reliable electrical connection even as device size decreases, allowing higher integration density without performance degradation.
Solution Approach 2:
The patent changes the material parameter of the contact layer from conventional metal to metal boride, which has different electrical and bonding properties. This parameter change reduces contact resistance and minimizes defect formation, enabling scaled-down device dimensions while maintaining performance.
3Device complexity
If conventional metal electrodes directly contact 2D semiconductor channel layers, then device structure is simple, but contact resistance is high due to Fermi-level pinning
Solution Approach 1:
The patent adds metal boride as an intermediary layer between the metal electrode and the 2D semiconductor channel layer. Although this increases structural complexity slightly, it dramatically reduces contact resistance by preventing Fermi-level pinning and minimizing defect formation at the contact interface.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The use of metal boride conductive layers improves the mobility of 2D semiconductor materials by reducing contact resistance and defects, enhancing the performance of semiconductor devices by selecting appropriate work functions and crystallization structures that match the 2D semiconductor materials.
Implementation Method 1
Incorporating metal boride compounds, such as TiB2, ZrB2, and HfB2, as conductive layers that form edge or planar contacts with 2D semiconductor channel layers, reducing contact resistance through Van der Waals bonding and minimizing defect generation.
Implementation Method 2
Each of the first conductive layer and the second conductive layer may include metal boride
Data Source
AI summary
A semiconductor device may include a channel layer including a two-dimensional (2D) semiconductor material, a gate insulating layer on a center portion of the channel layer, a gate electrode on the gate insulating layer, and a first conductive layer and a second conductive layer respectively contacting opposite sides of the channel layer. Each of the first and second conductive layers may include metal boride.