2D Channel Transistor Doping Layout for Lower Contact Resistance
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Solution Overview
Problem
The increasing integration of semiconductor devices highlights the need for improved contact resistance between semiconductor device layers, which current transistors with 3D channels fail to address effectively, limiting operational characteristics and speed.
Innovation Solution
Transistors with a 2D channel layer having regions with different doping concentrations, where the doping concentrations of two regions are the same and different from the remaining region, or using a combination of 2D and 3D channels with specific doping layers to reduce contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If transistors with 3D channels are used, then device integration is achieved, but contact resistance increases and operational speed decreases
Solution Approach 1:
The patent changes the dimensional parameter of the channel from 3D to 2D, which fundamentally alters the electrical transport properties. This parameter change reduces contact resistance at the electrode-channel interface while maintaining high carrier mobility, thereby improving both operational speed and reliability simultaneously
Solution Approach 2:
The patent employs composite channel structures combining different 2D materials (such as TMDs and black phosphorous) with specific doping configurations. This composite approach allows optimization of both contact resistance and carrier mobility by selecting materials with complementary properties
2Speed
If 2D channel materials are used, then carrier mobility increases, but contact resistance between electrodes and channel must be managed
Solution Approach 1:
The patent applies different doping concentrations to different regions of the 2D channel. High doping concentrations are applied near electrode contacts to reduce contact resistance, while lower doping concentrations are maintained in the channel region to preserve high carrier mobility. This spatial variation in doping quality resolves the contradiction between contact resistance and operating speed
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach reduces contact resistance and enhances the operating speed of transistors while minimizing power consumption, offering improved operational characteristics compared to traditional transistors.
Implementation Method 1
a channel layer including a two-dimensional (2D) channel and comprising at least two regions having different doping concentrations
Data Source
AI summary
A transistor including at least one two-dimensional (2D) channel is disclosed. A transistor according to some example embodiments includes first to third electrodes separated from each other, and a channel layer that is in contact with the first and second electrodes, parallel to the third electrode, and includes at least one 2D channel. The at least one 2D channel includes at least two regions having different doping concentrations. A transistor according to some example embodiments includes: first to third electrodes separated from each other; a 2D channel layer that is in contact with the first and second electrodes and parallel to the third electrode; a first doping layer disposed under the 2D channel layer corresponding to the first electrode; and a second doping layer disposed under the 2D channel layer corresponding to the second electrode, wherein the first and second doping layers contact the 2D channel layer.