2D Vertical Fin Formation With Sharp Corners for Uniform Channels
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Solution Overview
Problem
Existing FinFET devices face challenges in achieving consistent fin channel thickness and device performance variations due to rounded corners at the intersection of perpendicular arms, which affect transistor width and drive current.
Innovation Solution
A two-step process involving annealing to reduce shape irregularity and a crystal-plane selective etch is used to form two-dimensional vertical fins with atomically sharp corners, enhancing fin channel consistency and performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching methods are used to form fins, then the fabrication process is simple, but the fin channel thickness is inconsistent due to rounded corners at arm intersections
Solution Approach 1:
The method performs preliminary actions by first forming openings with irregular shapes, then heat treating them to reduce surface area and create more regular shapes before the final etching step. This preliminary shaping action ensures that the subsequent etching produces fins with consistent thickness and sharp corners at arm intersections, resolving the uniformity issue without requiring complex real-time control during etching
Solution Approach 2:
The patent introduces an intermediary heat treatment step between opening formation and final etching. This intermediary process modifies the opening geometry by reducing surface area and creating more regular shapes, which then serve as improved templates for the etching process, achieving better fin uniformity without directly complicating the etching step itself
2Reliability
If openings with irregular shapes are directly etched, then the fabrication process is faster, but the fin channel thickness varies and device performance is inconsistent
Solution Approach 1:
The method performs preliminary heat treatment to regularize opening shapes before etching, ensuring consistent fin channel thickness and reliable device performance. This advance preparation eliminates performance variations caused by irregular opening geometries while maintaining efficient fabrication by using standard heat treatment and etching processes
Solution Approach 2:
The patent changes the geometric parameters of the openings through heat treatment, transforming irregular shapes into more regular forms with reduced surface area. This parameter modification ensures that subsequent etching produces fins with uniform thickness, achieving reliable device performance without requiring excessive process steps
3Manufacturing precision
If heat treatment is applied to reduce opening surface area, then the fin channel thickness uniformity improves, but the fabrication time increases
Solution Approach 1:
The method efficiently changes the geometric parameters of openings through heat treatment, reducing surface area and regularizing shapes to ensure consistent fin thickness. The heat treatment process is optimized to achieve the necessary geometric transformations in a practical time frame, balancing precision improvement with acceptable fabrication cycle time
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method results in improved uniformity and increased drive current for FinFET devices by ensuring consistent fin channel thickness and reduced performance variations.
Implementation Method 1
heat treating a periodic array of irregular openings in a substrate, wherein there are walls of substrate material between adjacent openings, to reduce the surface area of the openings
Implementation Method 2
etching the openings with a crystal-plane selective etch to form squared openings in the substrate
Data Source
AI summary
A method of forming a two dimensional (2D) vertical fin is provided. The method includes heat treating a periodic array of irregular openings in a substrate, wherein there are walls of substrate material between adjacent openings, to reduce the surface area of the openings, and etching the openings with a crystal-plane selective etch to form squared openings in the substrate.