2DEG Gate Terminus Layout for Lower Off-State Leakage
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Solution Overview
Problem
GaN-based high electron mobility transistors (HEMTs) experience high leakage current when in the nonconductive state due to electric current flowing around the ends of the gate line, which affects device performance.
Innovation Solution
The gate line terminus at each end of the gate line is enlarged to increase the length of the leakage path, and additional design features are implemented to further reduce leakage, including modifying the gate mask and isolation region to extend the gate metal into the isolation area.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the gate line is designed with standard dimensions, then the device structure is simple and easy to manufacture, but high leakage current flows around the gate ends reducing device performance
Solution Approach 1:
The gate line is segmented into three distinct portions: a central section with standard gate width, and two enlarged terminus sections at each end with increased gate width. This segmentation allows the gate to simultaneously maintain simple central structure while adding leakage-blocking functionality at the ends through the wider terminus portions that extend into the isolation region.
Solution Approach 2:
The gate line structure is modified locally at the terminus regions rather than uniformly across the entire gate. The enlarged gate width is applied only at the ends where leakage current flows around the gate, while the central portion maintains its original dimensions. This local modification targets the specific leakage problem area without unnecessarily complicating the entire gate structure.
2Reliability
If the gate line terminus is enlarged to extend into the isolation region, then the leakage path length increases reducing leakage current, but the manufacturing precision requirements increase
Solution Approach 1:
The gate mask is designed in advance with pre-defined enlarged terminus sections that extend into the isolation region. This preliminary design of the mask pattern ensures that during fabrication, the enlarged gate terminus portions are automatically formed with proper dimensions and positioning, reducing the need for subsequent precise alignment steps and simplifying the manufacturing process while achieving leakage suppression.
3Reliability
If the gate metal is extended into the isolation area, then additional leakage paths are blocked improving off-state performance, but the device complexity increases
Solution Approach 1:
The gate metal structure is merged with the isolation region by extending the gate metal into the isolation area at the terminus portions. This merging creates a unified structure where the gate metal and isolation region work together to block leakage current paths, eliminating the need for separate leakage-blocking components and reducing overall device complexity while improving off-state performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively suppresses leakage current by lengthening the electric current path around the gate ends, thereby improving the device's off-state conductivity and reducing chip probe current values.
Implementation Method 1
a two-dimensional electron gas (2DEG) is formed at a heterointerface between a ternary aluminum gallium nitride (AlxGa1-xN) layer and a gallium nitride (GaN) layer. The 2DEG is formed due to the piezoelectric effect
Data Source
AI summary
A semiconductor device comprises an insulating region surrounding an active area having a channel direction and a transverse direction that is transverse to the channel direction. A source region and a drain region are disposed in the active area, and are spaced apart along the channel direction. A channel is disposed in the active area and is interposed between the source region and the drain region. The channel comprises a two-dimensional electron gas (2DEG). A gate line is oriented along the transverse direction and is disposed on the channel and has a gate width in the channel direction. The gate line comprises gate material. A gate line terminus is disposed at each end of the gate line. Each gate line terminus comprises the gate material. Each gate line terminus has a width in the channel direction that is at least 1.2 time the gate width.