Monolithic 2DEG Transistor Substrate Biasing for Leakage Control
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Solution Overview
Problem
Transistors face challenges with leakage current and efficiency, particularly due to high vertical electrical fields that can lead to substrate leakage and reduced lifespan.
Innovation Solution
A monolithic integrated circuit with a power transistor and a biasing circuit that utilizes a four-terminal transistor structure, where the substrate is used as an additional terminal to adjust the vertical electrical field and control the thickness of the 2DEG, thereby reducing leakage current and enhancing saturation current.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the transistor structure uses conventional three-terminal configuration with substrate shorted to source, then the device complexity is low, but substrate leakage occurs due to high vertical electrical fields
Solution Approach 1:
The invention segments the substrate connection by electrically isolating the substrate from the source contact, creating independent electrical paths. The substrate is connected to a separate biasing circuit rather than being shorted to the source, allowing independent control of substrate potential to reduce vertical leakage currents.
Solution Approach 2:
The invention introduces an intermediary biasing circuit between the substrate and ground, which actively controls the substrate potential to counteract high vertical electrical fields. This intermediary structure mediates the electrical field distribution, reducing substrate leakage without requiring fundamental changes to the transistor architecture.
2Power
If the transistor operates at high voltage for efficient power transfer, then the power transfer capability increases, but leakage current increases and reduces transistor lifespan
Solution Approach 1:
The biasing circuit applies a preliminary counter-voltage to the substrate that opposes and reduces the vertical electrical field before it can cause significant leakage current. This preliminary anti-action protects the transistor from degradation effects of high voltage operation, extending lifespan while maintaining power transfer capability.
Solution Approach 2:
The invention dynamically adjusts the substrate bias parameter to optimize performance. By changing the substrate potential through the biasing circuit, the vertical electrical field is modulated to reduce leakage current while maintaining the high voltage operation needed for efficient power transfer, thus extending transistor lifespan.
3Power
If the vertical electrical field is increased to enhance saturation current, then the saturation current increases, but substrate leakage current increases
Solution Approach 1:
The biasing circuit applies a localized counter-field specifically at the substrate region beneath the transistor channel, without affecting the main vertical field in the channel itself. This local quality adjustment reduces leakage current at the substrate interface while preserving the high saturation current capability in the channel region.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The solution effectively reduces vertical leakage, conserves power, extends the transistor's lifespan, and increases the saturation current, allowing for more efficient power transfer and potentially smaller transistor footprints.
Implementation Method 1
An interface between the channel semiconductor layer and the barrier semiconductor layer induces a two-dimensional electron gas (2DEG) within the channel semiconductor layer
Implementation Method 2
the biasing circuit configured to bias a portion of the semiconductor substrate beneath the power transistor
Data Source
AI summary
A monolithic implementation of an integrated circuit that includes a power transistor and a biasing circuit for biasing the substrate of the power transistor. For example, the integrated circuit comprises a semiconductor substrate; and an epitaxial stack epitaxially grown on the semiconductor substrate. A power transistor uses a portion of the epitaxial stack including a portion of the channel semiconductor layer and a portion of the barrier semiconductor layer. Furthermore, a biasing circuit includes circuit elements that use a respective portion of the epitaxial stack including a respective portion of the channel semiconductor layer and a portion of the barrier semiconductor layer. The biasing circuit is configured to bias a portion of the semiconductor substrate beneath the power transistor.