2DEG Transistor Substrate Biasing to Reduce Leakage Current
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Solution Overview
Problem
Transistors using silicon face limitations in conducting high power and operating efficiently, leading to issues like leakage current and degradation, especially due to substrate-related flaws and high electric fields.
Innovation Solution
A transistor structure with a biased substrate is introduced, featuring a barrier semiconductor layer and a channel semiconductor layer forming a heterojunction, which induces a two-dimensional electron gas (2DEG). This structure includes a source and drain contact, a gate terminal, and a semiconductor substrate that can be biased independently, effectively acting as a fourth terminal.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If silicon is used to fabricate transistors, then manufacturing is easier and cost is lower, but power conduction capability and operating efficiency are limited
Solution Approach 1:
The patent changes the material parameter from silicon to silicon carbide, which has fundamentally different electrical properties including wider bandgap and higher breakdown field strength, enabling high power conduction capability while maintaining manufacturability through established SiC processing techniques
Solution Approach 2:
The patent employs a heterostructure combining silicon carbide channel layer with aluminum nitride barrier layer, creating a composite material system that leverages the high power capability of SiC and the high electron mobility at the interface to achieve both power conduction and efficiency
2Power
If silicon carbide is used to fabricate high power transistors, then power conduction and operating efficiency are improved, but substrate leakage current increases causing degradation
Solution Approach 1:
The patent introduces an aluminum nitride barrier layer as an intermediary between the silicon carbide channel and the substrate. This intermediate layer acts as a protective barrier that prevents leakage current paths while maintaining the high power conduction capability of the SiC channel
Solution Approach 2:
The patent extracts or removes the problematic direct interface between the silicon carbide channel and substrate by inserting the aluminum nitride barrier layer, thereby eliminating the leakage current paths that would otherwise cause transistor degradation
3Power
If heterostructure is formed to create 2DEG, then saturation current is improved, but device complexity increases
Solution Approach 1:
The patent changes the material composition parameters by forming a heterostructure with specific bandgap differences between aluminum nitride and silicon carbide layers, which creates the two-dimensional electron gas and enables high saturation current
Solution Approach 2:
The patent uses a composite heterostructure of aluminum nitride and silicon carbide layers, where the interface between these two materials naturally forms the 2DEG channel, achieving high saturation current through material properties rather than complex device architecture
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The biased substrate reduces vertical leakage current, conserves power, extends transistor life, and allows for increased saturation current, enabling more efficient power transfer and potentially smaller transistor footprints, leading to higher yields and improved on-resistance characteristics.
Implementation Method 1
a barrier semiconductor layer and a channel semiconductor layer immediately beneath the barrier semiconductor layer to form a heterojunction interface with the barrier semiconductor layer, the heterojunction inducing a two-dimensional electron gas (2DEG) within the channel semiconductor layer
Data Source
AI summary
A transistor structure that includes a biased substrate. The transistor structure comprises a barrier semiconductor layer and a channel semiconductor layer immediately beneath the barrier semiconductor layer to form a heterojunction interface with the barrier semiconductor layer, the heterojunction inducing a two-dimensional electron gas (2DEG) within the channel semiconductor layer. A semiconductor substrate is beneath and rigidly coupled to the channel semiconductor layer and the barrier semiconductor layer. A substrate contact layer is disposed immediately beneath the semiconductor substrate. The substrate contact layer is electrically disconnected from the source contact to allow for a different voltage to be applied to the substrate contact layer as compared to the source contact. A biasing circuit is configured to bias the substrate contact layer.