3C-SiC Layer on 4H-SiC for Low Schottky Barrier Height

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Solution Overview

Problem

Existing electronic devices on 4H-SiC substrates face challenges in controlling the Schottky Barrier Height (SBH) and do not fully address the challenges of energy consumption and efficiency, and the breakdown voltage of SiC is also greater than that of Silicon.

Innovation Solution

The method involves forming electronic devices, such as JBS or MPS diodes, using a 3C-SiC layer on a 4H-SiC substrate, which includes a cubic silicon carbide (3C-SiC) layer on the surface of the drift layer, and a Silicon Carbide (SiC) layer, and a Carbon-rich layer, with ohmic contacts formed by chemical reaction with Nickel, and a passivation layer to protect the anode metallization.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If 4H-SiC substrate is used, then ease of manufacturing and breakdown voltage are improved, but Schottky Barrier Height control is worsened

Engineering Contradiction:
Improveease of manufacturingVSAvoidSchottky Barrier Height control
Core Design Contradiction:
Ease of manufactureVSManufacturing precision

Solution Approach 1:

The patent applies local quality by creating a 3C-SiC layer specifically at the surface region where Schottky contacts are formed, while maintaining the bulk 4H-SiC substrate. This localized change in crystal structure allows different regions to have different properties: the surface region provides low SBH for efficient Schottky diodes, while the bulk maintains high breakdown voltage and manufacturing advantages of 4H-SiC.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent uses composite materials by combining two different SiC polytypes (3C-SiC and 4H-SiC) in a single device structure. The 3C-SiC layer is grown on the 4H-SiC substrate, creating a composite structure that leverages the advantageous properties of both materials: 3C-SiC for low Schottky Barrier Height and 4H-SiC for high breakdown voltage and ease of manufacturing.

Inventive Principle:
Principle #40Composite materials

2Loss of energy

If 3C-SiC layer is formed on 4H-SiC substrate, then Schottky Barrier Height is reduced, but device complexity increases

Engineering Contradiction:
Improveconduction lossesVSAvoiddevice structure
Core Design Contradiction:
Loss of energyVSDevice complexity

Solution Approach 1:

The patent segments the device structure into distinct functional layers: a bulk 4H-SiC substrate for mechanical support and high voltage handling, and a surface 3C-SiC layer for efficient Schottky contact formation. This segmentation allows each layer to be optimized for its specific function, reducing overall energy loss while maintaining manufacturability.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent changes the crystallographic parameter (polytype) of the SiC material from 4H to 3C specifically in the surface region where Schottky contacts are formed. This parameter change reduces the Schottky Barrier Height and consequently reduces conduction losses, while the bulk material parameters remain unchanged to maintain manufacturing simplicity.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach allows for lower Schottky Barrier Height (SBH) values, reducing energy consumption and conduction losses, while maintaining high breakdown voltage and reverse bias.

Implementation Method 1

ohmic contacts formed by chemical reaction with Nickel

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Data Source

PatentEP4246554B1Forming an electronic device, such as a JBS or MPS diode, based on 3c-sic, and 3c-sic electronic device
Publication Date: 2025.12.10 STMICROELECTRONICS SRL
  • EP4246554B1 patent drawingFigure 1
  • EP4246554B1 patent drawingFigure 2A~3A
  • EP4246554B1 patent drawingFigure 3B~3C

AI summary

Method for manufacturing an electronic device (50; 80), comprising the steps of: forming, at a front side (2a) of a solid body (3, 2) of 4H-SiC having a first electrical conductivity (N), at least one implanted region (9') having a second electrical conductivity (P) opposite to the first electrical conductivity (N); forming, on the front side (2a), a 3C-SiC layer (52); and forming, in the 3C-SiC layer (52), an ohmic contact region (54; 84) which extends through the entire thickness of the 3C-SiC layer (52), up to reaching the implanted region (9'). A Silicon layer (56) may be present on the 3C-SiC layer; in this case, the ohmic contact also extends through the Silicon layer.