3D Capacitance Extraction Using Layered Transition Cubes
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Solution Overview
Problem
Existing capacitance extraction methods for integrated circuits struggle with complex 3D designs, particularly in handling arbitrarily oriented obstacles and optimizing transition volumes, leading to inefficient memory usage and computational burdens.
Innovation Solution
A method and system for capacitance extraction that decomposes a 3D semiconductor structure into virtual layers, creates spatial indexes, and constructs optimal transition cubes using a unified spatial index and random walks to efficiently calculate capacitance, addressing arbitrarily oriented conductors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If existing capacitance extraction methods are used for complex 3D IC designs, then capacitance values can be extracted, but memory usage and computational burden increase significantly
Solution Approach 1:
The patent decomposes the complex 3D semiconductor structure model into multiple virtual layers, where each layer contains polygons representing conductors at that specific depth. This segmentation allows the capacitance extraction problem to be divided into smaller 2D spatial index problems per layer, rather than handling the entire 3D structure as one complex problem, thereby reducing computational burden while maintaining accuracy
Solution Approach 2:
The patent transforms the 3D capacitance extraction problem into a series of 2D problems by creating virtual layers at different depth positions. By projecting 3D conductors onto 2D planes and using spatial indexes in these 2D layers, the method reduces the dimensionality of the computational problem, making it more efficient while still capturing the essential 3D geometric relationships through the layer stack
2Adaptability or versatility
If existing capacitance extraction methods handle arbitrarily oriented obstacles, then more complex geometries are supported, but transition volume optimization is insufficient leading to increased processing time
Solution Approach 1:
The patent dynamically adjusts the transition volume geometry based on the actual conductor orientations and positions in each virtual layer. Instead of using fixed or pre-defined transition volumes, the method creates adaptive transition volumes that conform to the specific geometric configuration of conductors, including arbitrarily oriented ones, thereby maintaining versatility while improving processing efficiency through optimized volume calculations
3Quantity of substance
If 3D semiconductor structure models are decomposed into virtual layers with spatial indexes, then memory requirements are reduced, but additional processing steps are required
Solution Approach 1:
The patent segments the 3D semiconductor structure into multiple virtual layers, each with its own spatial index data structure. This segmentation reduces memory requirements by processing one layer at a time rather than loading the entire 3D structure into memory simultaneously. The method manages the complexity of multiple processing steps through systematic layer-by-layer decomposition and reuse of spatial index structures across layers
Data Source
AI summary
A CAD method for capacitance extraction includes decomposing a semiconductor structure model representing a three-dimensional, into virtual layers. Each virtual layer has polygons corresponding to conductors in the semiconductor structure model. The semiconductor structure model or includes a geometric point. The method includes creating spatial indexes respectively for the virtual layers. Each spatial index indicates respectively for each spatial index cell of a corresponding virtual layer at least one candidate conductor of the corresponding virtual layer. The method includes creating optimal transition squares for the geometric point respectively for one or more consecutive virtual layers according to spatial indexes of the one or more consecutive virtual layers. The geometric point is located in one of the one or more consecutive virtual layers. The optimal transition squares are constrained by one or more candidate conductors of the one or more consecutive virtual layers. The method includes creating an optimal transition cube for the geometric point considering the one or more candidate conductors based on the optimal transition squares. The method includes calculating capacitance of the three-dimensional circuit using surfaces of the optimal transition cube.