3D Capacitive Structure With Contoured Wells for High-Voltage Reliability
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Solution Overview
Problem
Existing 3D capacitive structures for high-voltage applications face issues with electrostatic field concentration and mechanical stress, leading to premature failure and complexity in dielectric integration due to sharp corners and inadequate dielectric thickness.
Innovation Solution
A capacitive structure with a substrate having contoured wells, a dielectric layer conforming to the substrate's shape, and an insulating layer contacting the dielectric through openings, reducing electrostatic field intensity by effectively increasing local dielectric thickness and using additional electrodes to equalize potential differences.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the dielectric layer thickness is increased to sustain the operating electrical field in high voltage applications, then the electrical field margin is improved, but the mechanical stress and wafer warpage are exacerbated
Solution Approach 1:
The patent applies curvature by rounding the corners of the protruding wall structures (pillars) in the 3D capacitive device. This spherical/curved geometry replaces sharp corners, which redistributes mechanical stress more uniformly throughout the dielectric layer, preventing stress concentration that would lead to cracking or delamination. This allows the use of thicker dielectric layers for high voltage applications without exacerbating mechanical stress and wafer warpage issues.
2Duration of action of stationary object
If the dielectric layer thickness is increased to prevent premature wearing out, then the device lifetime is improved, but the probability of dielectric defects such as cracking or delamination increases
Solution Approach 1:
By rounding the corners of the pillar structures, the patent eliminates stress concentration points that would otherwise initiate dielectric defects. The curved geometry distributes mechanical stress uniformly across the dielectric layer, preventing crack initiation and delamination even in thicker dielectric layers required for high voltage applications, thereby enabling longer device lifetime without increased defect probability.
Solution Approach 2:
The patent applies different geometric qualities to different regions of the capacitive structure. Specifically, the corners of the protruding walls are rounded while other regions maintain their original geometry. This localized application of curvature specifically addresses the stress concentration issue at corner regions without affecting other areas, allowing thicker dielectric layers to be used reliably.
3Ease of manufacture
If sharp corners are used in the wall structure, then the manufacturing process is simpler, but the electrostatic charge concentration increases leading to electrical stress
Solution Approach 1:
The patent rounds the corners of the protruding wall structures to eliminate sharp edges that concentrate electrostatic charge. This curvature distributes the electrostatic field more uniformly across the dielectric layer, reducing electrical stress and preventing premature breakdown. The rounding process is compatible with existing manufacturing techniques such as plasma treatment or chemical-mechanical polishing, maintaining reasonable manufacturing simplicity while eliminating the harmful electrostatic field concentration.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure can tolerate higher operating voltages with reduced failures by minimizing electrostatic field intensity, making it suitable for high-voltage applications.
Implementation Method 1
the intensity of the electrostatic field which is produced in the dielectric when a potential difference is applied between the first and second electrodes is reduced in the portions of the dielectric that are in contact with the insulating layer
Implementation Method 2
The openings at the bottom of the wells are obturated by the dielectric whereby the dielectric defines blind holes within the wells and the first electrode is in said blind holes
Data Source
AI summary
An electronic component comprising a 3D capacitive structure includes a substrate having a contoured surface comprising a plurality of wells extending from the surface into the substrate body, a dielectric formed over, and conforming to the shape of, the contoured surface, and a first electrode formed over the dielectric and conforming to the contoured surface shape. The substrate constitutes a second electrode and the dielectric is interposed between it and the first electrode. Portions of the dielectric are exposed through openings at the base of the contoured surface and contact an insulating layer formed under the substrate, reducing the electrostatic field arising in the contacted portions of the dielectric when a potential difference is applied between the first and second electrodes. The openings at the bottom of the wells are obturated by the dielectric, defining blind holes within the wells, and the first electrode is in the blind holes.