3D Capacitor Structure for High-Density Semiconductor Memory

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Solution Overview

Problem

The challenge of increasing data storage capacitance in semiconductor devices while maintaining reliability and electrical characteristics, particularly as integration levels increase and capacitor area decreases, has not been adequately addressed.

Innovation Solution

A semiconductor device design featuring a capacitor structure with a first electrode structure, a dielectric liner, and a second electrode structure that extends through a through-hole, enhancing electrostatic capacity and reliability through a stacked configuration.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If the integration level of the semiconductor device is increased, then the area occupied by the capacitor decreases, but the electrostatic capacity must be maintained or increased

Engineering Contradiction:
Improveintegration levelVSAvoidcapacitor area
Core Design Contradiction:
ProductivityVSArea of stationary object

Solution Approach 1:

The capacitor structure transitions from a planar two-dimensional configuration to a three-dimensional vertical configuration. The first electrode structure extends vertically from the substrate, and the second electrode structure surrounds it in a cylindrical or annular fashion, creating a vertical capacitor that utilizes the third dimension (height) to achieve high capacitance while occupying minimal planar area. This dimensional transformation allows the capacitor to maintain or increase electrostatic capacity despite the reduced area constraint.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Productivity

If the integration level of the semiconductor device is increased, then the area occupied by the capacitor decreases, but the reliability of the capacitor structure must be maintained

Engineering Contradiction:
Improveintegration levelVSAvoidcapacitor reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The second electrode structure is nested around the first electrode structure, forming a concentric or annular configuration. The dielectric liner is nested between the two electrode structures, creating a layered nested arrangement. This nested configuration maximizes the use of available space while maintaining proper electrical isolation and mechanical stability, thereby ensuring reliability in a compact high-integration environment.

Inventive Principle:
Principle #7Nested doll (Nesting)

Solution Approach 2:

The dielectric liner acts as an intermediary layer between the first electrode structure and the second electrode structure. It provides electrical isolation to prevent short circuits, mechanical support to maintain the structural integrity of the vertical capacitor, and a uniform interface that ensures consistent electrical characteristics. This intermediary element is crucial for maintaining reliability in the high-aspect-ratio capacitor structure.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Quantity of substance

If a vertical capacitor structure is implemented to increase electrostatic capacity, then the aspect ratio of the electrodes increases, but the structural reliability becomes more challenging to secure

Engineering Contradiction:
Improveelectrostatic capacityVSAvoidaspect ratio
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The capacitor structure employs composite material design with the first electrode structure, dielectric liner, and second electrode structure forming a composite vertical capacitor. The dielectric liner material is selected to provide both electrical isolation and mechanical strength, enabling the structure to withstand the stresses associated with high aspect ratios. This composite approach allows the capacitor to achieve high electrostatic capacity while maintaining structural reliability despite the increased complexity from the vertical configuration.

Inventive Principle:
Principle #40Composite materials

Data Source

PatentEP4626166A1Semiconductor devices having capacitor structures and data storage systems including the same
Publication Date: 2025.10.01 SAMSUNG ELECTRONICS CO LTD
  • EP4626166A1 patent drawingFigure 1A
  • EP4626166A1 patent drawingFigure 1B~1C
  • EP4626166A1 patent drawingFigure 1D

AI summary

A semiconductor device according to example embodiments of the present disclosure may include a first semiconductor structure including a substrate and circuit elements on the substrate, and a second semiconductor structure including a plate layer having at least one through-hole and a capacitor structure on a lower surface of the plate layer. The capacitor structure may include a first electrode structure on the lower surface of the plate layer, a second electrode structure that surrounds at least a portion of the first electrode structure and extends in the at least one through-hole, and a dielectric liner extending between the at least one through-hole and the second electrode structure and between the first electrode structure and the second electrode structure.