3D Capacitor Structure for High-Density Oxide Semiconductor Stacks
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Solution Overview
Problem
Current semiconductor devices face challenges in miniaturization and high-density integration while maintaining favorable electrical characteristics, with existing techniques struggling to suppress degradation of electrical properties as devices are miniaturized.
Innovation Solution
A semiconductor device structure is developed, featuring a first transistor over a semiconductor substrate, a second transistor with an oxide semiconductor, and a capacitor with a stacked-layer structure of high dielectric strength and high-k materials, along with interlayer films providing barrier properties and excess oxygen, to enhance capacitance and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional capacitor structures are used, then manufacturing is simpler, but capacitance per projected area is insufficient for miniaturization
Solution Approach 1:
The patent transitions from planar capacitor electrodes to vertically stacked three-dimensional electrodes, utilizing the depth dimension to increase capacitance. The first and second electrodes are positioned at different vertical levels with insulating layers between them, creating a multi-layer capacitor structure that achieves higher capacitance per projected area without increasing lateral footprint.
Solution Approach 2:
The patent implements nested capacitor structures where conductive plugs are embedded within insulating layers, and multiple capacitor elements are stacked vertically within a compact footprint. The first conductor is nested within the insulator layer structure, and the second conductor is positioned above, creating a compact nested arrangement that maximizes capacitance density.
2Area of moving object
If miniaturization is pursued, then device size is reduced, but electrostatic breakdown risk increases
Solution Approach 1:
The patent applies different material properties to different regions of the capacitor structure. High-k dielectric materials are used in specific insulating layers to enhance local electric field resistance, while conductive plugs with specific work functions are positioned at critical interfaces. This localized optimization of material properties maintains electrostatic breakdown resistance despite reduced overall device dimensions.
Solution Approach 2:
The patent employs composite capacitor structures combining multiple dielectric materials with different properties (high-k materials, silicon oxide, silicon nitride) and conductive materials (tungsten, copper, aluminum) in a stacked configuration. This composite approach allows simultaneous optimization of capacitance density and breakdown voltage resistance in different layers of the miniaturized structure.
3Reliability
If oxide semiconductor transistors are used, then electrical characteristics improve, but manufacturing precision requirements increase
Solution Approach 1:
The patent optimizes the thickness and composition parameters of the oxide semiconductor layer to achieve desired electrical characteristics. By carefully controlling the oxide semiconductor layer thickness (typically 3-10 nm) and oxygen content, the invention achieves low off-state current and high mobility while maintaining compatibility with existing manufacturing tolerances through parameter optimization rather than requiring ultra-precise manufacturing.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed structure enables miniaturization and high-density integration of semiconductor devices with improved electrical characteristics and reliability, maintaining performance while reducing the area required for capacitance, thus addressing the challenges of miniaturization.
Implementation Method 1
The capacitor includes a first conductor, a second conductor, and an insulator. The second conductor covers a side surface of the first conductor with the insulator provided therebetween.
Implementation Method 2
using high-dielectric strength materials and barrier properties to inhibit electrostatic breakdown
Data Source
AI summary
A semiconductor device that is suitable for miniaturization and higher density is provided. A semiconductor device includes a first transistor over a semiconductor substrate, a second transistor including an oxide semiconductor over the first transistor, and a capacitor over the second transistor. The capacitor includes a first conductor, a second conductor, and an insulator. The second conductor covers a side surface of the first conductor with an insulator provided therebetween.