3D Integrated Capacitor Pillars With Rounded Corners for Low Leakage

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Solution Overview

Problem

Current three-dimensional integration technologies face challenges in achieving high-density integration of diverse components while minimizing electrical discharge and current leakage, particularly due to the presence of sharp corners and projected points in the capacitor structures.

Innovation Solution

The manufacturing method involves forming a three-dimensional integrated structure with a component array that includes pillar-shaped capacitors. This is achieved by creating a substrate with conductive features, forming a component array with capacitors electrically connected to the substrate, and using a series of metallic and dielectric layers to construct the capacitors with rounded corners to reduce electrical discharge and current leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of manufacture

If sharp corners and projected points are used in capacitor structures, then manufacturing is simpler, but electrical discharge and current leakage increase

Engineering Contradiction:
Improvecapacitor structure fabricationVSAvoidelectrical performance
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies curvature by replacing sharp corners and projected points with rounded corners in the capacitor structure. Specifically, the bottom electrode pattern and upper electrode pattern are designed with rounded corners instead of sharp angles. This curvature eliminates the concentration of electrical stress at sharp points, thereby preventing electrical discharge and current leakage while maintaining manufacturing feasibility through standard photolithography and etching processes.

Inventive Principle:
Principle #14Spheroidality (Curvature)

2Quantity of substance

If high aspect ratio pillar-shaped capacitor structures are formed, then capacitance increases within limited area, but manufacturing complexity increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidcapacitor structure
Core Design Contradiction:
Quantity of substanceVSDevice complexity

Solution Approach 1:

The patent implements nesting by placing the upper electrode pattern inside the bottom electrode pattern to form a pillar-shaped capacitor structure. The upper electrode is entirely contained within the footprint of the bottom electrode, creating a vertical pillar configuration. This nested arrangement maximizes capacitance within a limited planar area by utilizing the vertical dimension, while the rounded corner design simplifies the manufacturing process compared to other high-aspect-ratio structures.

Inventive Principle:
Principle #7Nested doll (Nesting)

3Reliability

If rounded corners are used in capacitor structures, then current leakage is minimized, but manufacturing precision requirements increase

Engineering Contradiction:
Improveelectrical performanceVSAvoidcorner rounding accuracy
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by optimizing the radius of curvature for the rounded corners. The corner rounding is designed with a specific radius that is large enough to eliminate electrical discharge and current leakage, but small enough to be accurately formed using standard photolithography and etching processes. This parameter optimization balances the electrical performance benefits of rounded corners with the practical limitations of manufacturing precision, ensuring that the rounded corners can be reliably produced without requiring excessive manufacturing precision.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS20250029918A1Method for forming three-dimensional integrated structure
Publication Date: 2025.01.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US20250029918A1 patent drawing
  • US20250029918A1 patent drawing
  • US20250029918A1 patent drawing

AI summary

A three-dimensional integrated structure and the manufacturing method(s) thereof are described. The three-dimensional integrated structure includes a substrate having conductive features therein, and a component array disposed over the substrate and on the conductive features. The component array includes a metallic material layer and capacitor structures separated by the metallic material layer. Each of the capacitor structures includes a first metallic pillar, a first dielectric sheath surrounding the first metallic pillar, a second metallic sheath surrounding the first dielectric sheath, and a second dielectric sleeve surrounding the second metallic sheath. The metallic material layer laterally encapsulates the capacitor structures.