3D Channel Structure for Lower-Resistance Semiconductor Contacts
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The increasing demand for high-performance, high-speed, and multi-functional semiconductor devices requires finer patterns with narrower widths and closer spacing distances, which poses challenges in manufacturing and electrical characteristics.
Innovation Solution
A semiconductor device with a channel structure is designed, featuring a horizontal portion contacting a landing pad and a vertical channel portion extending upward, along with a gate electrode and a bit line for electrical connection. The channel structure's design increases contact area and reduces contact resistance with the landing pad and bit line.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the degree of integration is increased to achieve higher performance and speed, then functionality and processing capability are improved, but manufacturing precision and pattern formation become more difficult
Solution Approach 1:
The channel structure transitions from a conventional planar configuration to a three-dimensional structure with horizontal and vertical portions. This dimensional change allows the channel to contact the landing pad at multiple points (lower surface of horizontal portion and side surface of vertical channel portion), effectively increasing the contact area without requiring finer lateral patterning, thus resolving the contradiction between integration density and manufacturing precision.
2Reliability
If the contact area between channel structure and landing pad is increased to reduce contact resistance, then electrical characteristics are improved, but device complexity increases
Solution Approach 1:
The channel structure is segmented into distinct horizontal and vertical portions, each serving specific functions. The horizontal portion provides contact with the landing pad's upper surface, while the vertical portion extends upward and contacts the bit line. This segmentation achieves multiple contact functions with a structured approach that manages complexity through functional division rather than random complexity.
Solution Approach 2:
By extending the channel structure into the vertical dimension, the patent creates additional contact surfaces (side surface of vertical channel portion contacting landing pad, upper surface of vertical channel portion contacting bit line) that increase the effective contact area and reduce contact resistance without requiring excessive lateral complexity.
Data Source
AI summary
A semiconductor device includes an information storage structure on a substrate;a landing pad on the information storage structure; a channel structure including a horizontal portion contacting an upper surface of the landing pad, and a vertical channel portion extending from one end of the horizontal portion in an upward direction; a gate electrode disposed on the horizontal portion; and a bit line contacting an upper surface of the vertical channel portion and electrically connected to the channel structure. A lower surface of the horizontal portion is located on a level lower than an upper end of the landing pad. A side surface of the vertical channel portion is partially in contact with the landing pad.


