3D Spiral Chip Inductor Layout for Higher Q in Less Substrate Area
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Solution Overview
Problem
Conventional chip inductors face challenges in increasing the Q value while minimizing the area occupied on a mounting substrate, as enlarging the coil conductor leads to increased substrate size, hindering high-density mounting and efficient use of space.
Innovation Solution
A chip inductor design with a sealing body that encases a coil conductor, allowing the coil to be enlarged three-dimensionally along the normal direction of the mounting surface, thereby reducing the two-dimensional footprint and maintaining a compact form factor.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the coil conductor is enlarged to increase the Q value, then the Q value is improved, but the area occupied on the mounting substrate increases
Solution Approach 1:
The patent transitions the coil conductor from a two-dimensional planar spiral pattern on the substrate surface to a three-dimensional vertical structure. The coil conductor extends in the thickness direction of the substrate, forming multiple layers that are stacked vertically. This dimensional change allows the coil to achieve larger effective area and higher Q value without increasing the footprint area on the mounting substrate, thereby resolving the contradiction between Q value improvement and substrate area minimization.
2Reliability
If the coil conductor is enlarged three-dimensionally, then the Q value increases, but the manufacturing complexity increases
Solution Approach 1:
The patent divides the coil conductor into multiple discrete layers stacked vertically. Each layer can be formed independently using separate conductor patterns and insulator layers. This segmentation allows for modular manufacturing where each layer is processed separately, reducing the overall manufacturing complexity compared to forming a single complex three-dimensional structure in one step.
Solution Approach 2:
The patent forms the multi-layer coil structure by sequentially building up layers during the manufacturing process. Insulator layers are deposited and patterned first, followed by conductor layers that are formed within the defined spaces. This preliminary preparation of the layered structure simplifies subsequent processing steps and enables systematic manufacturing of the three-dimensional coil configuration.
Data Source
AI summary
A chip inductor includes a sealing body having a mounting surface and a coil conductor sealed in an interior of the sealing body, wherein the coil conductor includes a first coil end exposed from the mounting surface of the sealing body, a second coil end exposed from the mounting surface of the sealing body, and a spiral portion of spiral form connected to the first coil end and the second coil end and routed along a normal direction of the mounting surface of the sealing body from the first coil end and the second coil end.