3D-Printed Chip Packaging for Better Top-Side Thermal Contact
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Solution Overview
Problem
Existing methods for contacting and packaging semiconductor chips result in a poorer electrical and thermal connection on the upper side compared to the underside, leading to quality losses.
Innovation Solution
A method involving 3D multi-material printing is used to create a ceramic insulation layer around the semiconductor chip, with both the lower and upper contact faces being printed using a 3D multi-material printer, followed by heat treatment to ensure a robust thermal and electrical connection.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bond wires are used to contact the upper side of the semiconductor chip, then the chip can be electrically connected, but the electrical and thermal connection quality is poorer compared to the underside
Solution Approach 1:
The patent merges the electrical contact function and thermal management function into a single integrated contact structure. The contact structure includes conductive elements that provide both electrical connection and thermal conduction pathways, eliminating the need for separate bond wires and thermal management components. This integration directly addresses the contradiction by improving connection quality while reducing device complexity.
Solution Approach 2:
The contact structure employs composite materials with optimized electrical and thermal properties. The structure combines conductive materials with high thermal conductivity to simultaneously achieve excellent electrical connection and thermal management, resolving the contradiction between connection quality and structural complexity.
2Loss of energy
If traditional plastic packaging is used, then manufacturing is simple, but thermal conductivity is insufficient leading to power losses
Solution Approach 1:
The patent changes the thermal conductivity parameter of the packaging material by replacing traditional plastic with a contact structure that has high thermal conductivity. This parameter change directly reduces power losses while the modular design of the contact structure maintains ease of manufacture through standardized production processes.
Solution Approach 2:
The contact structure serves multiple functions simultaneously: electrical connection, thermal conduction, and mechanical support. This multi-functionality eliminates the need for separate thermal management components, reducing power losses while maintaining manufacturing simplicity through an integrated design.
3Reliability
If the upper side is contacted by bond wires, then electrical connection is achieved, but the thermal connection is poorer resulting in quality loss
Solution Approach 1:
The patent merges electrical connection and thermal connection functions into a single contact structure, eliminating the need for separate bond wires. This integration improves thermal connection quality while enhancing manufacturing efficiency by reducing the number of assembly steps and components.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method enhances the quality of both electrical and thermal connections, reducing power losses by utilizing ceramic insulation materials with higher thermal conductivity than traditional plastic packaging, thereby improving the overall performance of power electronic components.
Implementation Method 1
a ceramic insulation layer (3), which surrounds the semiconductor chip (2) along its circumference and extends over the first contact face (1) not covered by the semiconductor chip (2), is printed onto the lower contact face (1)
Implementation Method 2
in a fifth method step the power electronic component is sintered by means of heat treatment
Implementation Method 3
utilizing ceramic insulation materials with higher thermal conductivity than traditional plastic packaging
Data Source
AI summary
A method for contacting and packaging a semiconductor chip of a power electronic component. The power electronic component has a first contact face produced in a first step via a multi-material printing process and a semiconductor chip, which is placed in a second step onto the first contact face. A ceramic insulation layer, which surrounds the semiconductor chip along its circumference and extends over the first contact face not covered by the semiconductor chip, is printed in a third step onto the first contact face. A second contact face is printed in a fourth step onto the ceramic insulation layer and the semiconductor chip. In a fifth step, the power electronic component is sintered by means of heat treatment.