3D Chip Stacking With TSVs for High-Speed SER/DES Interconnects
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Solution Overview
Problem
The use of wirebond technology in stacked die packaging is unsuitable for high-speed SER/DES applications due to the creation of inductance and capacitance, which hinders efficient data transmission and thermal management.
Innovation Solution
The implementation of Through Silicon Via (TSV) technology within the SER/DES block to connect dice vertically, eliminating the need for wirebond and enabling more compact, high-density packaging with improved electrical and thermal performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If wirebond technology is used in stacked die packaging, then ease of manufacture is improved, but inductance and capacitance increase which degrades high-speed signal transmission
Solution Approach 1:
The patent extracts and removes the wirebond interconnect from the stacked die packaging system, replacing it with Through-Silicon Via (TSV) technology. This extraction eliminates the inductance and capacitance problems associated with wirebond while maintaining manufacturing feasibility through established TSV fabrication processes.
Solution Approach 2:
The patent substitutes the mechanical wirebond system with an integrated TSV system that is formed directly within the silicon substrate. This replacement transitions from a discrete mechanical interconnect to an integrated semiconductor structure, eliminating parasitic effects while preserving ease of manufacture through standard semiconductor processing.
2Ease of manufacture
If wirebond technology is used in stacked die packaging, then ease of manufacture is improved, but thermal management capability deteriorates
Solution Approach 1:
The patent extracts the thermal management function from the wirebond structure and relocates it to the TSV structure. By removing the thermally inadequate wirebond and implementing TSV with integrated thermal pathways, the system maintains manufacturing simplicity while achieving superior heat dissipation.
Solution Approach 2:
The TSV structure serves multiple functions simultaneously: electrical interconnection between stacked dies and thermal conduction pathway. This multi-functionality eliminates the need for separate thermal management components, maintaining ease of manufacture while improving temperature control.
3Reliability
If TSV technology is used to connect dice vertically, then inductance and capacitance are reduced improving signal transmission, but device complexity increases
Solution Approach 1:
The patent merges the electrical interconnection function and thermal management function into the single TSV structure. This consolidation reduces the number of separate components and interconnect structures needed, thereby reducing overall device complexity while maintaining improved signal transmission characteristics.
Solution Approach 2:
The TSV structure performs multiple functions including electrical connection, thermal conduction, and mechanical support. This multi-functionality reduces the number of separate components required, simplifying the overall device architecture despite the advanced manufacturing processes involved.
4Quantity of substance
If stacked die packaging is implemented, then integration density is improved, but package height increases requiring spacer materials
Solution Approach 1:
The patent extracts and removes the spacer materials from the stacked die packaging structure. By eliminating spacers through the implementation of TSV technology with integrated alignment and support features, the system achieves high integration density while reducing package height.
Solution Approach 2:
The patent transitions from planar packaging to three-dimensional stacked architecture using TSV technology. This dimensional change enables vertical integration of multiple dies, significantly increasing integration density while the integrated TSV structure eliminates the need for height-increasing spacer materials.
Data Source
AI summary
Methods and systems for stacking multiple chips with high speed serializer/deserializer blocks are presented. These methods make use of Through Via (TV) to connect the dice to each other, and to the external pads. The methods enable efficient multilayer stacking that simplifies design and manufacturing, and at the same time, ensure high speed operation of serializer/deserializer blocks, using the TVs.