3D-Printed Chiplet Substrate for Complex Interconnect Routing
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Solution Overview
Problem
The existing semiconductor packaging technologies face challenges in reducing the high costs associated with interconnection processes, particularly as the complexity of structures increases, and they struggle to accommodate the diverse customization needs of semiconductor customers across various industries.
Innovation Solution
The implementation of 3D printing technology for customized semiconductor packaging allows for the simplification of interconnection processes and the reduction of costs by forming interconnection structures directly using 3D printing. This approach also enables the creation of substrates with tailored shapes and various interconnection patterns, optimizing process costs by eliminating the need for separate interconnection processes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional semiconductor packaging processes are used with multiple interconnection layers, then electrical connection performance is improved, but manufacturing cost increases sharply
Solution Approach 1:
The patent transitions from planar 2D interconnection patterns to three-dimensional spatial routing. Conductive traces are formed at multiple heights within the substrate using additive manufacturing, allowing electrical connections to progress vertically through the substrate thickness rather than requiring multiple lateral redistribution layers. This dimensional change reduces the number of manufacturing steps while achieving equivalent or superior electrical connection performance.
Solution Approach 2:
The patent changes the manufacturing parameters from conventional subtractive or planar processes to additive manufacturing with controlled deposition. By adjusting deposition parameters, trace geometry, and material composition during the printing process, the system achieves complex 3D interconnection structures in a single integrated process, eliminating the need for sequential layer fabrication and reducing overall manufacturing cost.
2Productivity
If standardized semiconductor packaging facilities are used, then production efficiency is maintained, but customization capability for diverse customer needs is reduced
Solution Approach 1:
The patent implements a dynamic manufacturing system where the substrate fabrication parameters can be adjusted in real-time based on customer specifications. The additive manufacturing process allows for on-the-fly modification of trace patterns, conductor pathways, and interconnection geometries without requiring retooling or changing production lines, enabling both high-volume production and custom orders to be fulfilled efficiently on the same equipment.
Solution Approach 2:
The patent creates a universal substrate platform that can accommodate various electronic components and interconnection requirements through a single manufacturing process. The same additive manufacturing system can produce substrates with different trace configurations, material compositions, and structural features to meet diverse customer needs across different application domains, eliminating the need for specialized production facilities for each customization scenario.
3Reliability
If complex interconnection structures are implemented, then electrical connection distance and number are increased, but process complexity increases
Solution Approach 1:
The patent combines multiple discrete manufacturing operations into a single additive manufacturing process. Instead of separately fabricating substrate layers, forming conductive traces, creating via holes, and assembling interconnection structures through multiple sequential steps, the system deposits conductive material directly into three-dimensional pathways within the substrate in one continuous process, significantly reducing process complexity while achieving complex interconnection geometries.
Solution Approach 2:
The patent replaces traditional mechanical and chemical manufacturing methods (such as photolithography, etching, and electroplating) with additive manufacturing technology. This substitution eliminates the need for complex process sequences involving multiple tooling changes, chemical baths, and precision alignment steps, reducing overall process complexity while enabling the creation of complex 3D interconnection structures with greater design flexibility.
Data Source
AI summary
According to various embodiments, a substrate for electrical connection between electronic components may include: a body having a single layer structure; and at least one interconnect having a conductivity formed inside the body, wherein the at least one interconnect includes one side and the other side exposed to the outside of the body, and a line connecting the one side and the other side, and wherein the line is crossed in a transverse direction or a longitudinal direction through the inside of the body of the single layer structure, and may be implemented to have a specific curvature in some sections. Other various embodiments are possible.