3D Circuit Assembly Layout for Lower Parasitic RF Loss
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Solution Overview
Problem
Conventional RF multiplexers and IC assemblies are physically large and complex, leading to increased parasitic effects and detuning due to their planar topology, which inhibits system performance and is ill-suited for accommodating complex circuit assemblies.
Innovation Solution
A vertically integrated circuit assembly is developed, where multiple circuit layers are stacked on a substrate with electrical interconnects forming interconnect arrangements on both surfaces, reducing the overall footprint and parasitic losses by positioning components in closer proximity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If conventional planar topology is used for IC assemblies, then ease of manufacture is improved, but area occupied and parasitic effects increase
Solution Approach 1:
The patent transitions from a planar two-dimensional layout to a three-dimensional vertically stacked architecture. Multiple circuit layers are stacked vertically with interconnect structures connecting corresponding pads between layers, enabling compact integration while maintaining manufacturability through established semiconductor packaging techniques.
2Ease of manufacture
If physical separation between components is increased in planar topology, then ease of manufacture is improved, but parasitic effects and loss increase
Solution Approach 1:
By stacking circuit layers vertically, the patent reduces the physical distance between components from horizontal planar separation to vertical proximity. The interconnect structures provide direct electrical pathways between corresponding pads on adjacent layers, minimizing parasitic inductance and resistance while facilitating manufacturing.
3Adaptability or versatility
If complexity of IC assembly increases, then functionality is improved, but size and parasitic effects inherently increase
Solution Approach 1:
The vertically stacked architecture enables multiple circuit layers to be integrated within a compact footprint. Each layer can contain different functional blocks, and the interconnect structures enable complex signal routing between layers, achieving high functionality without proportional increase in overall assembly size.
Solution Approach 2:
The patent divides the complex circuit assembly into multiple discrete layers, each potentially containing specific functional blocks. This segmentation allows independent design, fabrication, and testing of individual layers before stacking, facilitating complex functionality while maintaining manageable design complexity and compact overall size.
Data Source
AI summary
A vertically integrated circuit assembly may include a substrate including a plurality of electrical traces, and a first circuit assembly layer disposed on the substrate. In embodiments, the first circuit assembly layer includes a first set of integrated circuit components, and a plurality of electrical interconnects configured to route signals through the first circuit assembly layer. In embodiments, the vertically integrated circuit assembly further includes a second circuit assembly layer coupled to the top surface of the first circuit assembly layer. The second circuit assembly layer may include a second set of integrated circuit components, and a plurality of electrical interconnects configured to route signals through the second circuit assembly layer. In embodiments, an electrical interconnect arrangement on a top surface of the first circuit assembly layer is configured to interface with an electrical interconnect arrangement on the bottom surface of the second circuit assembly layer.