3D CMOS Gate Workfunction Metal for High-Temperature Stability
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Solution Overview
Problem
Integrated circuits with stacked transistor architectures face challenges in maintaining the stability of the lower transistor layer's gate workfunction metal during high-temperature processing of the upper transistor layer, leading to shifts in threshold voltage and limited design flexibility due to temperature-induced migration of aluminum-containing metals.
Innovation Solution
Employing a silicide workfunction metal, such as a compound of silicon and one or more metals, particularly titanium or tantalum silicide, for the lower transistor layer to withstand the processing temperatures of the upper layer, ensuring thermal stability and enabling the formation of NMOS gate structures before PMOS source and drain regions.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If aluminum-containing workfunction metal is used in the lower transistor layer, then the gate workfunction can be maintained during normal processing, but the threshold voltage shifts and design flexibility is limited due to temperature-induced migration during high-temperature processing of the upper layer
Solution Approach 1:
The patent changes the material parameter of the workfunction metal from aluminum-containing metal to silicide metal (such as titanium silicide, tantalum silicide, or tungsten silicide). This material substitution fundamentally alters the thermal stability parameter, allowing the lower gate workfunction to withstand high-temperature processing (above 400°C) without migration, thereby enabling full design flexibility in stacked transistor architectures.
2Manufacturing precision
If high-temperature processing is applied to the upper transistor layer, then the upper layer can be formed with proper electrical characteristics, but the lower transistor layer's gate workfunction metal migrates causing threshold voltage shifts
Solution Approach 1:
The patent introduces silicide metal as an intermediary material between the lower gate structure and the high-temperature processing environment. This silicide layer acts as a thermally stable workfunction metal that can withstand the high-temperature processing required for upper layer formation without migrating, thereby protecting the lower gate's electrical characteristics while allowing proper formation of the upper layer.
3Stability of the object's composition
If the lower gate workfunction metal is made thermally stable using silicide, then thermal stability is improved, but the device complexity increases due to additional processing steps
Solution Approach 1:
The patent applies preliminary action by forming the silicide workfunction metal layer in the lower gate structure before the high-temperature processing of the upper transistor layer. This advance preparation ensures that the lower gate is already protected against thermal migration, allowing subsequent high-temperature processing to proceed without compromising the lower gate's stability, thereby managing complexity through proactive material selection.
Data Source
AI summary
An integrated circuit having a transistor architecture includes a first semiconductor body and a second semiconductor body. The first and second semiconductor bodies are arranged vertically (e.g., stacked configuration) or horizontally (e.g., forksheet configuration) with respect to each other, and separated from one another by insulator material, and each can be configured for planar or non-planar transistor topology. A first gate structure is on the first semiconductor body, and includes a first gate electrode and a first high-k gate dielectric. A second gate structure is on the second semiconductor body, and includes a second gate electrode and a second high-k gate dielectric. In an example, the first gate electrode includes a layer comprising a compound of silicon and one or more metals; the second gate structure may include a silicide workfunction layer, or not. In one example, the first gate electrode is n-type, and the second gate electrode is p-type.