3D Crossbar Array Lithography Reduction
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Solution Overview
Problem
The high number of lithography process steps required for stacking multiple layers of crossbar structures in memristor and two-terminal devices increases fabrication complexity and cost, as each additional layer necessitates multiple lithography steps, especially for forming vias that connect different layers.
Innovation Solution
A three-dimensional crossbar array architecture that integrates multiple layers with a reduced number of lithography steps by using alternating layers of metal and insulator, where vertical via lines are etched to contact horizontal metal lines, allowing for simultaneous definition of features across multiple layers, thereby reducing the number of masking steps needed.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multiple layers of crossbar structures are stacked to increase storage capacity, then integration density and storage capacity are improved, but the number of lithography process steps increases proportionally, leading to increased fabrication complexity and cost
Solution Approach 1:
The patent merges the formation of multiple crossbar layers into a single lithography process by using a common lithography step to define patterns across all layers simultaneously. This is achieved by depositing multiple metal and insulator layers, then performing one lithography step to pattern all layers at once, rather than performing separate lithography steps for each layer. This combining approach resolves the contradiction by maintaining high integration density while eliminating the proportional increase in fabrication complexity.
Solution Approach 2:
The patent applies universality by designing a single lithography process that serves multiple functions: it simultaneously defines the patterns for all crossbar layers, forms vias for inter-layer connections, and establishes the overall three-dimensional architecture. This multi-functional approach allows one lithography step to accomplish what would traditionally require multiple separate steps, thereby increasing storage capacity without proportionally increasing fabrication complexity.
2Reliability
If multiple lithography steps are used to form vias and contact layers for each stacked layer, then electrical connections between layers are achieved, but fabrication cost and process time increase
Solution Approach 1:
The patent applies preliminary action by pre-depositing all metal and insulator layers in a stacked configuration before performing the lithography step. This allows the lithography process to simultaneously define vias and contact regions for all layers at once, rather than forming connections layer-by-layer. The preliminary layer deposition creates a ready-to-pattern structure that enables single-step via formation across all layers, reducing both fabrication time and cost while maintaining reliable electrical connections.
Solution Approach 2:
The patent maintains continuity of useful action by performing a single continuous lithography process that simultaneously creates all via openings and contact patterns for the entire stacked structure. This continuous process eliminates the need to stop and restart lithography operations between layers, thereby reducing total fabrication time while ensuring consistent electrical connections across all layers through a unified patterning approach.
Data Source
AI summary
A three-dimensional crossbar array may include a metal layer, and an insulator layer disposed adjacent the metal layer. A trench may be formed in the metal layer to create sections in the metal layer, and a portion of the trench may include an insulator. A hole may be formed in the trench and contact a section of the metal layer. The hole may define a via. A contact region between the via and the section of the metal layer may define a crossbar array.