3D Die Inductor Structure for High-Q in Limited Chip Area
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Solution Overview
Problem
Microelectronic devices with inductors in the range of 0.5 to 5 nanohenries require significant area and increase the size and cost, and achieving desirable Q values in these inductors has been challenging.
Innovation Solution
A microelectronic device design featuring first and second lateral conductors and conductive columns that form an inductor, with a configuration allowing for a high Q factor, including a toroidal configuration, and using copper with thicknesses of 3 to 30 microns to reduce electrical resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If conventional inductor designs are used to achieve 0.5 to 5 nanohenries, then the inductance value is obtained, but the area required increases to several hundred square microns or more
Solution Approach 1:
The patent transitions from planar inductor designs to three-dimensional vertical structures by stacking multiple conductor layers (first lateral conductors, conductive columns, second lateral conductors) to form bump bonds that extend perpendicular to the die surface. This vertical dimensionality allows achieving the required 0.5 to 5 nanohenries inductance in a compact footprint, reducing the area from several hundred square microns to a much smaller footprint while maintaining the target inductance range.
2Reliability
If conventional inductor designs are used, then the basic functionality is achieved, but the Q factor remains challenging to optimize
Solution Approach 1:
The patent employs composite material structures combining multiple conductor materials and configurations - copper or aluminum lateral conductors, conductive columns, and dielectric materials - to optimize the Q factor. The specific combination of materials and their geometric arrangements (lateral conductors connected via vertical columns) creates favorable electrical characteristics with reduced resistance and optimized current distribution, achieving high Q factors while managing the inherent structural complexity through systematic material selection.
3Reliability
If thicker copper conductors are used to reduce electrical resistance, then the Q factor improves, but the manufacturing complexity increases
Solution Approach 1:
The patent segments the conductor path into distinct functional components: first lateral conductors on the die surface, vertical conductive columns connecting to upper layers, and second lateral conductors forming bump bonds. This segmentation allows each segment to be optimized independently - with copper thickness of 3 to 30 microns specified for lateral conductors to reduce resistance and improve Q factor - while the overall structure remains manufacturable through standardized multi-layer fabrication processes.
Data Source
AI summary
A microelectronic device comprises: a die; a first metal column over a first bond pad of the die; a first metal strip over the die; a second metal column over the first metal strip; and a second metal strip over the first and second metal columns and over the die, in which the second metal strip has a pair of bent segments and a first segment coupled between the pair of bent segments.