3D Stacked Die Power Control Using Near-Die FETs and TSVs
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Solution Overview
Problem
Existing 3D integrated circuits face challenges in power management, requiring additional power planes that increase resource consumption and chip area, especially in stacked die configurations.
Innovation Solution
Configuring field effect transistors in a near die to control and regulate power delivery to power domains in a far die, eliminating the need for additional power planes by using through silicon vias and metal layers to convey power, and enabling or disabling subsets of transistors for power control.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Power
If additional power planes are added to 3D integrated circuits for power management, then power delivery capability is improved, but chip area and resource consumption increase
Solution Approach 1:
The patent transitions from traditional 2D power plane architecture to a 3D power delivery system using through-silicon vias (TSVs) that extend vertically through multiple stacked dies. Power is delivered through the z-dimension (vertical stacking) rather than only through horizontal power planes, enabling efficient power management in 3D integrated circuits without requiring additional chip area.
Solution Approach 2:
The through-silicon via structures serve multiple functions: they provide mechanical support for stacking, enable signal transmission between dies, and simultaneously serve as power delivery pathways. This multi-functionality eliminates the need for dedicated power planes, reducing chip area while maintaining power delivery capability.
2Loss of energy
If power control circuitry is added to regulate power in 3D stacked die, then power efficiency is improved, but device complexity increases
Solution Approach 1:
The patent introduces intermediary field effect transistors (FETs) positioned between the power source and power domains in far dies. These FETs act as controllable switches that regulate power delivery on-demand, enabling fine-grained power control to activate or deactivate specific power domains in stacked die configurations, thereby improving power efficiency while maintaining manageable device complexity.
Solution Approach 2:
Power control is implemented locally at specific power domains rather than globally across the entire system. Individual FETs or FET groups can independently control power to specific dies or power domains, enabling selective power management that improves efficiency without requiring complex system-wide control architecture.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Achieves power savings and reduces resource consumption by optimizing power delivery in 3D stacked die configurations, while maintaining efficient power regulation and thermal performance.
Implementation Method 1
configuring field effect transistors in a near die to control and regulate power delivery to power domains in a far die
Implementation Method 2
using through silicon vias and metal layers to convey power
Data Source
AI summary
A method for controlling power in 3D stacked die can include configuring a first die of a set of 3D stacked die to receive power from a power source, wherein the first die includes one or more field effect transistors configured to control the power. The method can also include configuring one or more power domains included in a second die of the set of 3D stacked die to receive the power that is controlled by the one or more field effect transistors included in the first die. Various other methods and systems are also disclosed.