3D DRAM Isolation Bridge for Floating-Body-Free Vertical Cells
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Solution Overview
Problem
Existing 3D DRAM devices face challenges in reducing cell size and increasing memory density without forming a floating body access transistor and increasing the cell area.
Innovation Solution
A method involving the formation of a memory stack with alternating layers, etching openings, depositing oxide and nitride layers, forming an epitaxial layer, and creating a word line gate to establish a semiconductor memory device with a local vertical substrate connection, avoiding floating body access transistors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If vertical-cell DRAM is used to increase storage per unit space, then memory density increases and chip area is reduced, but a floating-body access transistor is formed which affects device performance
Solution Approach 1:
The substrate is divided into multiple isolated regions using deep trench isolation structures. Each trench is filled with oxide material to create electrically isolated wells, segmenting the continuous substrate into discrete regions that prevent floating body effects while maintaining vertical stacking for high density.
Solution Approach 2:
Oxide-filled deep trench isolation structures serve as intermediary elements between adjacent vertical memory cells. These isolation trenches act as mediators that electrically separate the substrate regions, preventing the formation of floating body access transistors while allowing the vertical cells to maintain their high-density configuration.
2Area of moving object
If cell size is reduced to increase memory density, then more memory fits on a chip, but the formation of floating body access transistors affects performance
Solution Approach 1:
The continuous substrate is segmented into isolated regions by deep trench isolation structures filled with oxide material. This segmentation allows individual small cells to be electrically isolated from each other, preventing floating body effects even as cell dimensions are reduced to increase density.
Solution Approach 2:
The isolation structure extends into the vertical dimension with deep trenches filled with oxide material, creating isolation in the third dimension rather than relying solely on planar separation. This vertical isolation approach enables smaller cell footprints while maintaining electrical isolation to prevent floating body effects.
3Reliability
If deep trench isolation openings are formed to prevent floating body effect, then device performance is maintained, but manufacturing complexity increases
Solution Approach 1:
The deep trench isolation structures are merged with the well formation process, combining multiple functions into a single integrated structure. The oxide-filled trenches serve both as isolation barriers and as defined regions for subsequent epitaxial growth, reducing the need for separate processing steps and simplifying manufacturing.
Solution Approach 2:
The deep trench isolation structures are formed preliminarily before the epitaxial growth step. By pre-defining the isolation regions and filling them with oxide material, the subsequent epitaxial process can proceed without additional isolation steps, streamlining the overall manufacturing sequence while maintaining device performance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables reduced cell size and increased memory density while maintaining performance by eliminating floating body effects and enhancing isolation between channels.
Implementation Method 1
a first material layer and a second material layer, each comprising a different number of repetitions of the spin valve
Implementation Method 2
repeating a unit cell comprising a pinned layer, a first free layer, a first nonmagnetic layer, a second free layer, and a second nonmagnetic layer
Implementation Method 3
depositing a first oxide layer in each of the at least one deep trench isolation opening
Implementation Method 4
depositing a first oxide layer in each of the at least one deep trench isolation opening, at least one word line opening, and at least one P-substrate opening
Implementation Method 5
forming an epitaxial layer in the at least one P-substrate opening
Implementation Method 6
depositing a nitride layer in the at least one deep trench isolation opening and on the second oxide layer
Data Source
AI summary
Semiconductor devices and methods of manufacturing the same are described. The methods form a 3D DRAM architecture that includes a semiconductor isolation bridge, eliminating a floating body effect. The method includes forming an epitaxial layer in a deep trench isolation opening and creating a semiconductor isolation bridge between adjacent deep trench isolation openings.