3D DRAM Access Transistor Doping to Mitigate Floating Body Effect

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Solution Overview

Problem

As DRAM devices scale to smaller dimensions, the lack of body contacts in 3D DRAM structures leads to a floating body effect, causing transient leakage current and charge loss, which worsens bitcell sensing and can result in bit data flipping, and current methods to suppress this effect increase processing complexity.

Innovation Solution

The source and drain of the access device are thinned and doped with a narrow bandgap material like germanium to reduce the current gain of the parasitic bipolar transistor, mitigating the floating body effect without the need for body contacts, by forming a doped layer over the source and drain and adjusting the Ge concentration during epitaxial growth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If body contacts are added to suppress floating body effect, then transient leakage current is reduced, but processing complexity significantly increases

Engineering Contradiction:
Improvetransient leakage current suppressionVSAvoidprocessing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the body contact structure from the device architecture. Instead of adding body contacts to suppress floating body effect, the invention eliminates this component entirely by using a different mechanism (thin-film source/drain with specific doping profiles) that achieves the same effect without the additional complexity of body contacts, extra doping steps, interconnects, and spacing requirements

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the physical parameters of the source and drain regions by thinning them to specific thickness ranges (e.g., 5-20 nm) and modifying doping concentrations and profiles. These parameter changes alter the electrical characteristics to suppress floating body effect inherently, eliminating the need for body contacts while maintaining reliability

Inventive Principle:
Principle #35Parameter changes

2Productivity

If DRAM devices are scaled to smaller dimensions, then memory cell density increases, but floating body effect worsens due to charge accumulation

Engineering Contradiction:
Improvememory cell densityVSAvoidbitcell sensing accuracy
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies local quality by creating non-uniform doping profiles within the source and drain regions, with different doping concentrations at different locations and depths. The thin-film source/drain structure also exhibits local quality variations in thickness and composition (e.g., SiGe gradients), which locally suppress charge accumulation effects while maintaining overall device scaling and high density

Inventive Principle:
Principle #3Local quality

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach reduces the floating body effect, improving bitcell sensing and reducing processing complexity by avoiding the need for additional doping and interconnects, while maintaining existing 3D DRAM process flows.

Implementation Method 1

forming a doped layer over the source and over the drain

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20240373622A13D DRAM Access Transistor
Publication Date: 2024.11.07 APPLIED MATERIALS INC
  • US20240373622A1 patent drawing
  • US20240373622A1 patent drawing
  • US20240373622A1 patent drawing

AI summary

Disclosed herein are approaches for forming a 3-D dynamic random-access memory device having reduced floating body effect. In one example, a method may include forming a plurality of layers stacked in a first direction, the plurality of layers including a gate layer formed over a first oxide layer, and a source/drain (S/D) layer between a set of gate oxide layers. The set of gate oxide layers may be formed over the gate layer, and the S/D layer may include a source and a drain on opposite sides of a body. The method may further include forming a doped layer over the source and the drain.