3D DRAM Structure Vertical Pillar Bonding

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

As semiconductor technologies advance, it becomes challenging to further reduce device sizes in DRAMs without deteriorating electrical properties, and existing methods to improve these properties are complex and costly.

Innovation Solution

A semiconductor structure and fabrication method that involves forming active pillars and bit lines on a substrate, bonding them to a drive pad, and thinning the substrate to expose the pillars for capacitor formation, simplifying the process and increasing storage density while maintaining electrical properties.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If device sizes in DRAM are reduced to increase storage density, then storage density is improved, but electrical properties deteriorate

Engineering Contradiction:
Improvestorage densityVSAvoidelectrical properties
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent transitions from planar device architecture to vertical three-dimensional architecture. Active pillars are formed vertically extending from the substrate, and storage capacitors are positioned above the active pillars, utilizing the vertical dimension to increase storage density without further reducing lateral device dimensions. This dimensional change allows maintaining electrical properties while achieving higher storage density.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If conventional methods are used to improve electrical properties, then electrical properties are improved, but manufacturing complexity and cost increase

Engineering Contradiction:
Improveelectrical propertiesVSAvoidmanufacturing complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The manufacturing process is divided into separate stages on different substrates. First, active pillars are formed on a first substrate. Then, storage capacitors are formed on a second substrate. Finally, the two substrates are bonded together to assemble the complete device. This segmentation allows each substrate to be optimized independently, simplifying the manufacturing process for each stage while achieving improved electrical properties.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS20230013420A1Semiconductor structure and fabrication method thereof
Publication Date: 2023.01.19 CHANGXIN MEMORY TECH INC
  • US20230013420A1 patent drawing
  • US20230013420A1 patent drawing
  • US20230013420A1 patent drawing

AI summary

Embodiments provide a semiconductor structure and a method thereof. The method includes: providing a first substrate, and forming a drive pad on the first substrate; providing a second substrate, and forming active pillars and a bit line in sequence on a side of the second substrate, wherein a side of the bit line is connected to the active pillars, and a surface of the bit line facing away from the active pillars is exposed on a surface of the second substrate; bonding the bit line to the drive pad correspondingly; thinning the second substrate from a side of the second substrate facing away from the first substrate until the active pillars are exposed; and forming a storage capacitor on sides of the active pillars facing away from the drive pad, the storage capacitor being connected to the active pillars.