3D DRAM Groove Structure With Wavy Sidewalls to Cut Interface Defects

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Solution Overview

Problem

The performance of three-dimensional (3D) Dynamic Random Access Memory (DRAM) needs improvement due to challenges in controlling the uniformity of Indium Gallium Zinc Oxide (IGZO) material and interface defects caused by depositing multiple layers of silicon and germanium silicon.

Innovation Solution

A method for manufacturing a semiconductor structure that forms first and second grooves with convex sidewalls, where word lines and source-drain layers are formed at the interfaces of sub-grooves, avoiding the use of IGZO and superlattice technology to reduce defects and improve performance.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If IGZO material and superlattice structures are used in 3D DRAM, then integration and capacity per unit area are improved, but material uniformity control and interface defects worsen

Engineering Contradiction:
Improvecapacity per unit areaVSAvoidmaterial uniformity
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The patent removes the problematic IGZO material and superlattice structures from the 3D DRAM device. By extracting these materials that cause uniformity control issues and interface defects, the invention achieves better material quality while maintaining the desired high capacity per unit area through the vertical groove array structure.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent changes the material composition parameters by replacing IGZO with alternative materials and modifying the structural parameters by eliminating superlattice interfaces. This parameter change approach resolves the contradiction by achieving both high capacity and good material uniformity without the harmful interface effects.

Inventive Principle:
Principle #35Parameter changes

2Quantity of substance

If IGZO material and superlattice structures are used in 3D DRAM, then integration is improved, but interface defects worsen

Engineering Contradiction:
ImproveintegrationVSAvoidinterface defects
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent extracts and removes the superlattice structures that create multiple interfaces prone to defects. By eliminating these complex layered structures while maintaining vertical integration through grooves, the invention achieves high integration without the reliability penalties of interface defects.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Instead of using horizontal superlattice layers to achieve integration, the patent inverts the approach by using vertical grooves extending into the substrate. This inversion eliminates the need for numerous material interfaces while maintaining the three-dimensional integrated structure.

Inventive Principle:
Principle #13The other way round (Inversion)

3Quantity of substance

If conventional 3D DRAM structures are used, then capacity per unit area is improved, but performance worsens due to material defects

Engineering Contradiction:
Improvecapacity per unit areaVSAvoidperformance
Core Design Contradiction:
Quantity of substanceVSReliability

Solution Approach 1:

The patent converts the potential harm of deep groove formation into a benefit by using the groove depth to achieve high capacity per unit area while the groove geometry itself prevents material defects. The vertical structure transforms what could be a defect-prone interface into a defect-free configuration.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The method reduces defects and enhances the performance of the semiconductor structure by using monocrystalline silicon and a Bosch process to form wavy sidewalls, facilitating the formation of transistors without IGZO and superlattice technology.

Implementation Method 1

a first groove and a second groove are formed in the substrate... sidewalls of the first sub-grooves and sidewalls of the second sub-grooves being convex outwards

Methodology Applied
Scientific EffectBosch process:

Implementation Method 2

The method for manufacturing a semiconductor structure includes the following operations. A substrate is provided, and a first groove and a second groove are formed in the substrate

Methodology Applied
Scientific EffectPhysical Vapour Deposition: Physical Vapour Deposition

Data Source

PatentUS12563718B2Semiconductor structure and method for manufacturing same
Publication Date: 2026.02.24 CHANGXIN MEMORY TECH INC
  • US12563718B2 patent drawing
  • US12563718B2 patent drawing
  • US12563718B2 patent drawing

AI summary

A method for manufacturing a semiconductor structure and a semiconductor structure are provided. The manufacturing method includes the following operations. A substrate is provided, and a first groove and a second groove are formed in the substrate, each of the first groove and the second groove having a depth in a first direction. The first groove includes multiple first sub-grooves arranged in the first direction, the second groove includes multiple second sub-grooves arranged in the first direction, and sidewalls of the first sub-grooves and sidewalls of the second sub-grooves are convex outwards. Word lines protruding away from the first groove each are formed at an interface of adjacent first sub-grooves. First source-drain layers formed on the sidewalls of the first sub-grooves, and second source-drain layers protruding away from the second groove each are formed at an interface of adjacent second sub-grooves.