3D Fan-Out Bonding Wall Packaging for MEMS Reliability
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Solution Overview
Problem
The reduction in chip size and bonding area between the sealing wall and the device in microelectromechanical systems (MEMS) leads to reduced bonding force and reliability, necessitating a solution that enhances reliability and reduces costs while accommodating the increasing number of inputs/outputs (I/Os) in fan-out packaging technologies.
Innovation Solution
A three-dimensional packaging structure and method for fan-out of a bonding wall, where the device is encapsulated with an encapsulation material forming a fan-out surface, and a wall structure extending to cover bond pads, with a cover plate bonded to form a cavity, and a metal interconnection structure electrically connected to the bond pads, allowing for increased space and improved reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If chip size is reduced to lower cost, then manufacturing cost decreases, but bonding area between sealing wall and device decreases leading to reduced bonding force and reliability
Solution Approach 1:
The patent transitions from a planar sealing wall structure to a three-dimensional arch-shaped sealing wall that extends vertically from the device surface. This dimensional change allows the sealing wall to provide adequate bonding area and structural strength without increasing the horizontal footprint, thus maintaining reliability while accommodating smaller chip sizes.
Solution Approach 2:
The sealing wall is divided into multiple functional segments: a first sealing wall portion bonded to the device, a second sealing wall portion bonded to the cover plate, and an arch-shaped connecting portion joining them. This segmentation allows each portion to be optimized for its specific function, ensuring adequate bonding areas at both interfaces while maintaining overall structural integrity.
2Adaptability or versatility
If traditional planar fan-out packaging is used, then manufacturing process is simpler, but the structure cannot accommodate increased I/Os and chip integration requirements
Solution Approach 1:
The patent employs a three-dimensional arch-shaped sealing wall structure that rises vertically from the device surface, creating additional spatial volume without increasing the planar footprint. This enables the packaging to accommodate more I/Os and higher chip integration while maintaining a compact form factor suitable for modern electronics.
Solution Approach 2:
The packaging structure nests multiple functional elements within the three-dimensional space created by the arch-shaped sealing wall: the device, encapsulation material, metal interconnection structures, and cover plate are arranged in a nested configuration that maximizes I/O capacity within the available volume.
3Strength
If bonding area is reduced to minimize package size, then package dimensions decrease, but bonding force at the bonding interface is reduced
Solution Approach 1:
The arch-shaped sealing wall utilizes the vertical dimension to provide adequate bonding surface area without increasing the horizontal package footprint. The curved arch structure distributes bonding stresses more effectively and provides sufficient bonding area for both device and cover plate attachments while maintaining a compact overall package volume.
Solution Approach 2:
The sealing wall is formed using composite material structures that combine the device substrate, encapsulation material, and sealing wall portions into an integrated assembly. This composite approach allows optimization of bonding interfaces while controlling overall package volume through material selection and structural design.
Data Source
AI summary
Three-dimensional packaging structure for fan-out of bonding wall of device is provided. A first surface of a device is disposed with bond pads and functional area. The device, except for the first surface, is encapsulated with encapsulation material. A first surface of the encapsulation material horizontally connected to the first surface forms a fan-out surface. A wall structure is disposed on the first surface and extends to the fan-out surface. The wall structure partially covers at least one of the bond pads and comprises first opening corresponding to the at least one of the bond pads. Cover plate is bonded with the wall structure to form cavity corresponding to the functional area and comprises at least one second opening in communication with the first opening. A metal interconnection structure is disposed on surface of the cover plate and is electrically connected to the at least one of the bond pads.