3D Ferroelectric Memory Capacitor Layout for Stable Decoupling
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Solution Overview
Problem
The anti-interference capability of decoupling capacitors in three-dimensional integrated circuits deteriorates over time, leading to unstable power supply due to changes in capacitance value, which is exacerbated by polarization reversal in ferroelectric materials.
Innovation Solution
The implementation of a ferroelectric memory with a capacitor design that connects first and second capacitors in series, utilizing a series voltage division principle to reduce the electric potential difference between capacitor ends, thereby stabilizing capacitance and enhancing anti-interference capability. This is achieved by arranging conductive pillars and ferroelectric layers in specific configurations, including parallel and series connections of capacitors within a stacked layer structure.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a decoupling capacitor is disposed in a power distribution network to ensure power integrity, then the power distribution network can provide a stable power supply, but as operating time increases, the anti-interference capability of the decoupling capacitor deteriorates and the capacitance value changes
Solution Approach 1:
The decoupling capacitor is divided into two separate capacitors (first decoupling capacitor and second decoupling capacitor) connected in series. This segmentation allows the total voltage to be distributed across both capacitors, reducing the voltage stress on each individual capacitor and thereby improving reliability over extended operating periods.
Solution Approach 2:
The patent transitions from a single-capacitor configuration to a series configuration of two capacitors, adding a dimensional aspect to the voltage distribution. This dimensional change in the circuit topology enables better voltage sharing and reduces the likelihood of polarization reversal in any single capacitor.
2Reliability
If the capacitance value of the decoupling capacitor changes due to polarization reversal, then the anti-interference capability deteriorates, but connecting capacitors in series with voltage division reduces the probability of polarization reversal
Solution Approach 1:
The single capacitor is segmented into two capacitors connected in series. This segmentation distributes the voltage burden, reducing the electric potential difference across each capacitor and thereby reducing the probability of polarization reversal, which improves anti-interference capability.
Solution Approach 2:
The patent changes the electrical parameters by introducing a series configuration, which alters the voltage distribution characteristics. This parameter change (voltage division) directly reduces the stress on each capacitor, improving reliability while managing the increased structural complexity.
3Device complexity
If a single decoupling capacitor is used in the power distribution network, then the structure is simple, but the electric potential difference between capacitor ends causes polarization reversal and capacitance value changes
Solution Approach 1:
The single capacitor structure is segmented into two series-connected capacitors. This segmentation reduces the electric potential difference across each individual capacitor, minimizing polarization reversal effects and improving capacitance stability, while accepting increased structural complexity.
Solution Approach 2:
The patent introduces a series configuration dimension to the capacitor arrangement, transforming the voltage distribution pattern. This dimensional change in circuit topology enables reduced voltage stress per capacitor, improving reliability despite increased structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design effectively reduces the probability of polarization reversal, ensuring a stable capacitance value and improved anti-interference capability of the decoupling capacitor, thereby maintaining a stable power supply in three-dimensional integrated circuits.
Implementation Method 1
the probability of polarization reversal at the ferroelectric layer of the capacitor is reduced
Data Source
AI summary
This disclosure provides a ferroelectric memory, a three-dimensional integrated circuit, and an electronic device, and relates to the field of semiconductor chip technologies, to improve an anti-interference capability of a capacitor. The ferroelectric memory includes a capacitor. The capacitor includes a first stacked layer, a first conductive pillar, a second conductive pillar, a first ferroelectric layer, and a second ferroelectric layer. The first stacked layer includes a first conductive portion and a second conductive portion that are connected. The first conductive pillar penetrates the first conductive portion, and the second conductive pillar penetrates the second conductive portion. The first ferroelectric layer penetrates the first conductive portion and is disposed around the first conductive pillar, and the second ferroelectric layer penetrates the second conductive portion and is disposed around the second conductive pillar. The capacitor includes a first capacitor and a second capacitor that are disposed in series.