3D Ferroelectric Memory Cell Structure for High-Density Data Retention
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Solution Overview
Problem
Existing semiconductor memory devices face challenges in achieving high integration density and improved electrical characteristics, particularly in non-volatile memory devices like ferroelectric random access memory (FeRAM) devices.
Innovation Solution
A three-dimensional (3D) semiconductor memory device is designed with a specific structure that includes conductive pillars, electrodes, and a ferroelectric layer extending between them, connected by a channel layer, allowing for improved electrical connectivity and non-volatile data retention.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional planar memory structure is used, then manufacturing process is simpler, but integration density and electrical characteristics are limited
Solution Approach 1:
The patent transitions from a conventional planar (2D) memory structure to a three-dimensional (3D) structure by vertically stacking multiple electrode structures and cell strings. The electrode structures extend in a first direction with multiple electrodes stacked vertically, and cell strings extend in a second direction perpendicular to the first, creating a 3D architecture that significantly increases integration density while maintaining manufacturability through systematic layer-by-layer fabrication processes
2Reliability
If conventional memory structure is used, then device structure is simpler, but electrical characteristics and on-current properties are insufficient
Solution Approach 1:
The 3D structure with vertically stacked electrodes and perpendicular cell strings creates improved electrical characteristics by reducing resistance and enhancing on-current properties through the three-dimensional current flow paths and optimized electrode-channel layer interfaces
Solution Approach 2:
The patent employs a ferroelectric layer with specific properties positioned between the channel layer and electrode structure, creating localized functional regions that enhance data retention and electrical performance. The channel layer is specifically configured to connect conductive pillars while the ferroelectric layer provides non-volatile memory functionality at critical interfaces
3Reliability
If power is interrupted in conventional volatile memory, then data is lost, but non-volatile memory requires more complex structure to retain data
Solution Approach 1:
The patent utilizes the ferroelectric effect to change the physical state of the ferroelectric layer, which can retain its polarization state (and thus stored data) without continuous power supply. The ferroelectric layer's ability to maintain its electrical properties after power interruption provides non-volatile data retention with a structure that integrates seamlessly into the 3D memory architecture
Solution Approach 2:
The memory device combines multiple materials with different properties: the ferroelectric layer for non-volatile data storage, the channel layer for charge transport, and conductive pillars for electrical connection. This composite structure achieves both data retention and electrical functionality in an integrated manner
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The 3D structure enhances electrical characteristics by maintaining data integrity even when power is interrupted and improves on-current properties, reducing resistance and enhancing overall device performance.
Implementation Method 1
a ferroelectric layer and a channel layer between the electrode and the first and second conductive pillars. The ferroelectric layer may be between the electrode and the channel layer
Implementation Method 2
The channel layer may connect the first and second conductive pillars to each other. Each of the first and second cell strings may include a channel layer connecting the first conductive pillar and the second conductive pillar
Data Source
AI summary
A 3D semiconductor memory device includes a first through-structure on a substrate, the first through-structure comprising first and second conductive pillars spaced apart from each other in a first direction, an electrode adjacent to the first through-structure, the electrode horizontally extending in the first direction, and a ferroelectric layer and a channel layer between the electrode and the first and second conductive pillars. The channel layer connects the first and second conductive pillars to each other. The ferroelectric layer is disposed between the electrode and the channel layer. The ferroelectric layer extends from a sidewall of the first conductive pillar to a sidewall of the second conductive pillar along the channel layer when viewed in a plan view.