3D FET Work Function Metal Strain for Higher Carrier Mobility
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Solution Overview
Problem
Current three-dimensional (3D) field-effect transistors (FETs) face challenges in enhancing carrier mobility and drive strength without compromising their functionality, particularly in semiconductor slabs where applying forces to improve carrier mobility is not effectively addressed.
Innovation Solution
The use of work function metal layers on opposing faces of semiconductor slabs in 3D FET structures to exert tensile or compressive forces corresponding to the current flow direction, improving carrier mobility and drive strength by creating strains in the crystalline structure, while also providing a desired threshold voltage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If forces are applied to the channel region to improve carrier mobility, then carrier mobility is improved, but FET functionality may be compromised
Solution Approach 1:
The patent applies physical strain to the semiconductor channel region by introducing dislocation layers and controlling crystal orientation to change the physical parameters of the material. This strain modifies the band structure and carrier effective mass, thereby improving carrier mobility without requiring high forces that would compromise device functionality
Solution Approach 2:
The patent introduces dislocation layers specifically at the interface between the semiconductor channel and surrounding materials, rather than applying uniform strain throughout the entire device. This localized approach concentrates the strain effect where it most impacts carrier mobility while minimizing disruption to overall device structure and functionality
2Power
If three-dimensional FET structures are used to increase drive strength, then drive strength is improved, but area efficiency in integrated circuits is reduced
Solution Approach 1:
The patent transitions from planar two-dimensional channel structures to three-dimensional structures with vertical stacking of semiconductor layers. By utilizing the vertical dimension, multiple channel regions can be stacked above each other, increasing the effective channel width and drive strength without proportionally increasing the lateral footprint, thereby improving area efficiency
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach increases carrier mobility and drive strength in 3D FETs, saving area in integrated circuits and enhancing the performance of devices like wireless communication devices and processor-based systems.
Implementation Method 1
Field-effect transistors (FETs) employing thermal expansion of work function metal layers for strain effect
Data Source
AI summary
Forces applied to the channel regions of semiconductor slabs in a first direction relative to the semiconductor slab, can create strains in the crystal structure that improve carrier mobility to improve drive strength in the channel region. In a three-dimensional (3D) FET structure, a work function metal layer is provided on opposing faces of semiconductor slabs to cause a force to be exerted on the channel regions in a first direction corresponding to current flow. The force in the first direction is either tensile force or compressive force, depending on a FET type (N or P) employing the semiconductor slab, and is provided to create strain in a crystalline structure of the semiconductor slab to improve carrier mobility in the channel region. Increasing carrier mobility in the channel regions in a 3D FET structure increases drive strength of the 3D FET, which saves area in an integrated circuit.