3D-Stacked FET Contact Plug Isolation for Overlap Constraints
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Solution Overview
Problem
The formation of lower contact plugs in three-dimensional stacked field-effect transistors (3DSFETs) is complicated due to vertical overlap of source/drain regions, leading to challenges in landing contact plugs on the lower source/drain regions and increased risk of short-circuits and high contact resistance.
Innovation Solution
A semiconductor device with a metal-cut structure, such as silicon nitride, is introduced between the contact plugs and source/drain regions, isolating them from each other and allowing for a wider bottom width of the contact plugs, reducing the risk of short-circuits and improving contact resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If the upper and lower source/drain regions have the same size, then the device area is minimized, but the lower contact plug cannot be formed properly due to vertical overlap
Solution Approach 1:
The patent introduces a metal-cut structure that extends in the horizontal dimension between the upper and lower contact plugs, creating a physical separation that allows both contact plugs to be formed despite the vertical overlap of source/drain regions. This dimensional approach resolves the manufacturing difficulty while maintaining compact device area.
2Ease of manufacture
If the upper source/drain region is made smaller to allow contact plug formation, then the lower contact plug can be formed, but the upper source/drain region area is reduced
Solution Approach 1:
The metal-cut structure segments the region between upper and lower contact plugs, creating distinct formation zones for each contact plug. This segmentation allows both upper and lower source/drain regions to maintain their full size while enabling proper contact plug formation through the isolated spaces created by the metal-cut.
3Area of stationary object
If contact plugs are formed close together to minimize device area, then area is reduced, but the risk of short-circuit increases
Solution Approach 1:
The metal-cut structure acts as an intermediary element positioned between adjacent contact plugs, providing physical isolation that prevents short-circuits. This intermediary structure enables contact plugs to be placed closer together while maintaining reliable electrical isolation, thus reducing device area without compromising reliability.
4Area of stationary object
If the contact plug bottom width is reduced to fit in overlapping regions, then device area is minimized, but contact resistance increases
Solution Approach 1:
The metal-cut structure extracts or removes the overlapping conflict region, creating a dedicated space where the lower contact plug can be formed with adequate bottom width. By taking out the interfering upper source/drain region through the metal-cut, the lower contact plug achieves sufficient width for low contact resistance while maintaining compact overall device area.
Data Source
Figure 1A
Figure 1B
Figure 1C
AI summary
Provided is a semiconductor device including a 3DSFET device which includes: a 1st source/drain region; a 2nd source/drain region (223), above the 1st source/drain region, having a smaller width than the 1st source/drain region, the 2nd source/drain region being isolated from the 1st source/drain region by a 1st isolation structure (216); a 1st contact plug (217) on the 1st source/drain region; a 2nd contact plug (227) on the 2nd source/drain region; and a 2nd isolation structure (250), between the 1st contact plug and the 2nd contact plug, isolating the 2nd contact plug from the 1st contact plug, wherein the 2nd isolation structure is different and formed separately from the 1st isolation structure.