3D Flash Memory Air-Gap ONO Structure for Cell Interference Mitigation
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Solution Overview
Problem
The existing 3D flash memory technologies face challenges in vertical scaling due to interference phenomena between neighboring cells in the charge storage layer, particularly when reducing the thickness of electrode layers or interlayer insulating layers, which affects device performance and integration.
Innovation Solution
The introduction of air gaps between electrode layers and the use of an oxide-nitride-oxide (ONO) layer structure, where the first and nitride layers are etched in regions contacting the air gaps, along with the application of a blocking material layer on the electrode layers, to mitigate interference and enhance vertical scaling.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the thickness of electrode layers or interlayer insulating layers is reduced to improve vertical scaling, then integration density is improved, but interference phenomenon between neighboring cells in the charge storage layer occurs
Solution Approach 1:
Air gaps are introduced as intermediary structures between adjacent electrode layers to physically isolate and prevent interference between neighboring cells in the charge storage layer, while still allowing vertical stacking for improved integration density
Solution Approach 2:
The air gap structure is selectively applied only in regions where interference prevention is needed (between adjacent electrode layers), while maintaining continuous electrode layers and charge storage layers in vertical directions for proper device function
2Volume of moving object
If the thickness of electrode layers or interlayer insulating layers is reduced to improve vertical scaling, then integration density is improved, but device performance deteriorates
Solution Approach 1:
Air gaps serve as intermediary isolation structures that prevent performance degradation from interference while enabling continued vertical scaling, thus maintaining device performance at higher integration densities
Solution Approach 2:
The device structure is segmented into discrete vertical units separated by air gaps, allowing each cell to operate independently without performance interference from neighboring cells, even as vertical stacking increases integration density
Data Source
AI summary
A 3-dimensional (3D) flash memory having a structure that mitigates an interference phenomenon between neighboring cells in an oxide-nitride-oxide (ONO) layer, which is a charge storage layer, and a method of manufacturing the same are provided. The 3D flash memory includes at least one channel layer formed to extend in a first direction; a plurality of electrode layers formed to extend in a second direction orthogonal to a first direction so as to be vertically stacked with respect to the at least one channel layer; a plurality of air gaps interposed between the plurality of electrode layers to separate the plurality of electrode layers from each other; and at least one oxide-nitride-oxide (ONO) layer comprising a first oxide layer, a nitride layer, and a second oxide layer and formed to extend in the first direction to connect the at least one channel layer and the plurality of electrode layers, wherein the 3D flash memory includes a structure that mitigates an interference phenomenon between cells respectively contacting the plurality of electrode layers in the at least one ONO layer.